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參數(shù)資料
| 型號(hào)： | AD5445YRUZ |
| 廠(chǎng)商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 18/29頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 12BIT PARALL IOUT 20TSSOP |
| 產(chǎn)品培訓(xùn)模塊： | Data Converter Fundamentals DAC Architectures |
| 標(biāo)準(zhǔn)包裝： | 75 |
| 設(shè)置時(shí)間： | 80ns |
| 位數(shù)： | 12 |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類(lèi)型： | 表面貼裝 |
| 封裝/外殼： | 20-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 20-TSSOP |
| 包裝： | 管件 |
| 輸出數(shù)目和類(lèi)型： | 2 電流，單極；2 電流，雙極 |
| 采樣率（每秒）： | 20.4M |
| 產(chǎn)品目錄頁(yè)面： | 782 (CN2011-ZH PDF) |
| 配用： | EVAL-AD5445EBZ-ND - BOARD EVALUATION FOR AD5445 |
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AD5424/AD5433/AD5445
Data Sheet
Rev. D | Page 24 of 28
PCB LAYOUT AND POWER SUPPLY DECOUPLING
In any circuit where accuracy is important, careful consideration of
the power supply and ground return layout helps to ensure the
rated performance. The printed circuit board on which the
that the analog and digital sections are separated and confined
to certain areas of the board. If the DAC is in a system where
multiple devices require an AGND-to-DGND connection, the
connection should be made at one point only. The star ground
point should be established as close as possible to the device.
These DACs should have ample supply bypassing of 10 F in
parallel with 0.1 F on the supply, located as close to the package
as possible and ideally right up against the device. The 0.1 F
capacitor should have low effective series resistance (ESR) and
effective series inductance (ESI), like the common ceramic types
that provide a low impedance path to ground at high frequencies,
to handle transient currents due to internal logic switching. Low
ESR 1 F to 10 F tantalum or electrolytic capacitors should also be
applied at the supplies to minimize transient disturbance and filter
out low frequency ripple.
Fast switching signals such as clocks should be shielded with
digital ground to avoid radiating noise to other parts of the
board and should never be run near the reference inputs.
Avoid crossover of digital and analog signals. Traces on opposite
sides of the board should run at right angles to each other. This
reduces the effects of feedthrough through the board. A micro-
strip technique is by far the best, but not always possible with a
double-sided board. In this technique, the component side of
the board is dedicated to the ground plane, while signal traces
are placed on the solder side.
It is good practice to employ compact, minimum lead length
PCB layout design. Leads to the input should be as short as
possible to minimize IR drops and stray inductance.
The PCB metal traces between VREF and RFB should also be
matched to minimize gain error. To maximize high frequency
performance, the I-to-V amplifier should be located as close to
the device as possible.
Table 12. Overview of AD54xx and AD55xx Devices
Part No.
Resolution
No. DACs
INL(LSB)
Interface
Package
Features
8
1
±0.25
Parallel
RU-16, CP-20
10 MHz BW, 17 ns CS pulse width
8
1
±0.25
Serial
RM-10
10 MHz BW, 50 MHz serial
8
2
±0.25
Parallel
RU-20
10 MHz BW, 17 ns CS pulse width
8
2
±0.25
Serial
RU-10
10 MHz BW, 50 MHz serial
8
1
±0.25
Serial
RJ-8
10 MHz BW, 50 MHz serial
10
1
±0.5
Serial
RM-10
10 MHz BW, 50 MHz serial
10
1
±0.5
Parallel
RU-20, CP-20
10 MHz BW, 17 ns CS pulse width
10
2
±0.5
Serial
RU-16
10 MHz BW, 50 MHz serial
10
2
±0.5
Parallel
RU-24
10 MHz BW, 17 ns CS pulse width
10
1
±0.25
Serial
RJ-8
10 MHz BW, 50 MHz serial
12
1
±1
Serial
RM-10
10 MHz BW, 50 MHz serial
12
1
±0.5
Serial
RM-8
50 MHz serial interface
12
2
±1
Serial
RU-24
10 MHz BW, 50 MHz serial
12
2
±1
Parallel
CP-40
10 MHz BW, 17 ns CS pulse width
12
2
±1
Parallel
RU-20, CP-20
10 MHz BW, 17 ns CS pulse width
12
2
±1
Parallel
RU-24
10 MHz BW, 17 ns CS pulse width
12
2
±1
Serial
RU-16
10 MHz BW, 50 MHz serial
12
1
±0.5
Serial
RJ-8, RM-8
10 MHz BW, 50 MHz serial
14
1
±1
Serial
RM-8
10 MHz BW, 50 MHz serial
14
1
±2
Serial
UJ-8, RM-8
10 MHz BW, 50 MHz serial
14
1
±1
Serial
RM-8
4 MHz BW, 50 MHz serial clock
14
1
±1
Parallel
RU-28
4 MHz BW, 20 ns WR pulse width
14
2
±1
Serial
RM-8
4 MHz BW, 50 MHz serial clock
14
2
±1
Parallel
RU-38
4 MHz BW, 20 ns WR pulse width
16
1
±2
Serial
RM-8
4 MHz BW, 50 MHz serial clock
16
1
±2
Parallel
RU-28
4 MHz BW, 20 ns WR pulse width
16
2
±2
Serial
RU-16
4 MHz BW, 50 MHz serial clock
16
2
±2
Parallel
RU-38
4 MHz BW, 20 ns WR pulse width
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| AD5445YRUZ | 制造商:Analog Devices 功能描述:12BIT DAC PARALLEL I/F SMD 5445 |
| AD5445YRUZ-REEL | 功能描述:IC DAC 12BIT PARALL IOUT 20TSSOP RoHS:是 類(lèi)別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:LTC263x 12-, 10-, and 8-Bit VOUT DAC Family 特色產(chǎn)品:LTC2636 - Octal 12-/10-/8-Bit SPI VOUT DACs with 10ppm/°C Reference 標(biāo)準(zhǔn)包裝:91 系列:- 設(shè)置時(shí)間:4µs 位數(shù):10 數(shù)據(jù)接口:MICROWIRE?，串行，SPI? 轉(zhuǎn)換器數(shù)目:8 電壓電源:單電源 功率耗散（最大）:2.7mW 工作溫度:-40°C ~ 85°C 安裝類(lèi)型:表面貼裝 封裝/外殼:14-WFDFN 裸露焊盤(pán) 供應(yīng)商設(shè)備封裝:14-DFN-EP（4x3） 包裝:管件 輸出數(shù)目和類(lèi)型:8 電壓，單極 采樣率（每秒）:* |
| AD5445YRUZ-REEL7 | 功能描述:IC DAC 12BIT PARALL IOUT 20TSSOP RoHS:是 類(lèi)別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:LTC263x 12-, 10-, and 8-Bit VOUT DAC Family 特色產(chǎn)品:LTC2636 - Octal 12-/10-/8-Bit SPI VOUT DACs with 10ppm/°C Reference 標(biāo)準(zhǔn)包裝:91 系列:- 設(shè)置時(shí)間:4µs 位數(shù):10 數(shù)據(jù)接口:MICROWIRE?，串行，SPI? 轉(zhuǎn)換器數(shù)目:8 電壓電源:單電源 功率耗散（最大）:2.7mW 工作溫度:-40°C ~ 85°C 安裝類(lèi)型:表面貼裝 封裝/外殼:14-WFDFN 裸露焊盤(pán) 供應(yīng)商設(shè)備封裝:14-DFN-EP（4x3） 包裝:管件 輸出數(shù)目和類(lèi)型:8 電壓，單極 采樣率（每秒）:* |
| AD5445YRUZRUZ | 制造商:Analog Devices 功能描述:DAC,AD5445Y 12bit mult current TSSOP |
| AD5446 | 制造商:AD 制造商全稱(chēng):Analog Devices 功能描述:Dual 8-,10-,12-Bit High Bandwidth Multiplying DACs with Serial Interface |
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