參數(shù)資料
型號(hào)： AD5443BRM
廠商： ANALOG DEVICES INC
元件分類： DAC
英文描述： 8-/10-/12-Bit High Bandwidth Multiplying DACs with Serial Interface
中文描述： SERIAL INPUT LOADING, 0.04 us SETTLING TIME, 12-BIT DAC, PDSO10
封裝： 3 X 5 MM, MICRO, SOIC-10
文件頁(yè)數(shù)： 16/32頁(yè)
文件大小： 860K
代理商： AD5443BRM
AD5429/AD5439/AD5449
BIPOLAR OPERATION
In some applications, it might be necessary to generate full
4-quadrant multiplying operation or a bipolar output swing.
This can be easily accomplished by using another external
amplifier and three external resistors, as shown in Figure 38.
Rev. 0 | Page 16 of 32
When V
IN
is an ac signal, the circuit performs 4-quadrant
multiplication. When connected in bipolar mode, the output
voltage is
(
REF
OUT
D
V
V
2
)
REF
n
V
×
=
1
where D is the fractional representation of the digital word
loaded to the DAC, and n is the number of bits.
D
= 0 to 255 (AD5429)
= 0 to 1023 (AD5439)
= 0 to 4095 (AD5449)
Table 6 shows the relationship between digital code and the
expected output voltage for bipolar operation with the AD5429.
Table 6. Bipolar Code Table
Digital Input
1111 1111
1000 0000
0000 0001
0000 0000
Analog Output (V)
+V
REF
(2047/2048)
0
V
REF
(2047/2048)
V
REF
(2048/2048)
STABILITY
In the I-to-V configuration, the I
OUT
of the DAC and the
inverting node of the op amp must be connected as closely as
possible, and proper PCB layout techniques must be employed.
Because every code change corresponds to a step function, gain
peaking can occur, if the op amp has limited GBP and there is
excessive parasitic capacitance at the inverting node. This
parasitic capacitance introduces a pole into the open loop
response, which can cause ringing or instability in the closed-
loop applications circuit.
As shown in Figure 37 and Figure 38, an optional compensation
capacitor, C1, can be added in parallel with R
FB
for stability. Too
small a value of C1 can produce ringing at the output, while too
large a value can adversely affect the settling time. C1 should be
found empirically, but 1 pF to 2 pF is generally adequate for the
compensation.
0
I
OUT
1A
I
OUT
2A
GND
AD5429/
AD5439/
AD5449
SDIN
SCLK
V
REF
V
DD
C1
A1
V
OUT
= –V
REF
TO +V
REF
R2
V
DD
V
REF
±10V
SYNC
μ
CONTROLLER
A2
R4
10k
R5
20k
NOTES:
1. R1 AND R2 USED ONLY IF GAIN ADJUSTMENT IS REQUIRED.
ADJUST R1 FOR V
= 0V WITH CODE 10000000 LOADED TO DAC.
2. MATCHING AND TRACKING IS ESSENTIAL FOR RESISTOR PAIRS
R3 AND R4.
3. C1 PHASE COMPENSATION (1pF TO 2pF) MAY BE REQUIRED,
IF A1/A2 IS A HIGH SPEED AMPLIFIER.
4. DAC B AND ADDITIONAL PINS OMITTED FOR CLARITY.
R3
20k
R1
R
FB
A
AGND
Figure 38. Bipolar Operation
相關(guān)PDF資料
PDF描述
AD5443YRM 8-/10-/12-Bit High Bandwidth Multiplying DACs with Serial Interface
AD5443YRM-REEL 8-/10-/12-Bit High Bandwidth Multiplying DACs with Serial Interface
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AD5447 Dual 8-,10-,12-Bit High Bandwidth Multiplying DACs with Serial Interface
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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AD5443YRM-REEL7 制造商:Analog Devices 功能描述:DAC 1-CH R-2R 12-bit 10-Pin MSOP T/R 制造商:Analog Devices 功能描述:DAC 1CH R-2R 12-BIT 10MSOP - Tape and Reel
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