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參數(shù)資料
| 型號： | AD5426YRM |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 22/25頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC MULTIPLYING 8BIT 10-MSOP |
| 產(chǎn)品培訓模塊： | Data Converter Fundamentals DAC Architectures |
| 設計資源： | Unipolar, Precision DC Digital-to-Analog Conversion Using AD5426/32/43 8-Bit to12-Bit DACs (CN0034) Precision, Bipolar Configuration for the AD5426/32/43 8-Bit to12-Bit DACs (CN0036) AC Signal Processing Using AD5426/32/43 Current Output DACs (CN0037) Programmable Gain Element Using AD5426/32/43 Current Output DACs (CN0038) |
| 標準包裝： | 50 |
| 位數(shù)： | 8 |
| 數(shù)據(jù)接口： | 串行 |
| 轉換器數(shù)目： | 1 |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 10-TFSOP，10-MSOP（0.118"，3.00mm 寬） |
| 供應商設備封裝： | 10-MSOP |
| 包裝： | 管件 |
| 輸出數(shù)目和類型： | 2 電流，單極；2 電流，雙極 |
| 采樣率（每秒）： | 2.5M |
Data Sheet
AD5426/AD5432/AD5443
Rev. G | Page 5 of 24
TIMING CHARACTERISTICS
All input signals are specified with tr = tf = 1 ns (10% to 90% of VDD) and timed from a voltage level of (VIL + VIH)/2. VDD = 2.5 V to 5.5 V,
VREF = 10 V, IOUT2 = 0 V; temperature range for Y version: 40°C to +125°C; all specifications TMIN to TMAX, unless otherwise noted.
Table 2.
Parameter
2.5 V to 5.5 V
4.5 V to 5.5 V
Unit
Test Conditions/Comments
fSCLK
50
MHz max
Max clock frequency
t1
20
ns min
SCLK cycle time
t2
8
ns min
SCLK high time
t3
8
ns min
SCLK low time
13
ns min
SYNC falling edge to SCLK active edge setup time
t5
5
ns min
Data setup time
t6
3
ns min
Data hold time
t7
5
ns min
SYNC rising edge to SCLK active edge
t8
30
ns min
Minimum SYNC high time
80
45
ns typ
SCLK active edge to SDO valid
120
65
ns max
1 Falling or rising edge as determined by control bits of serial word.
2 Daisy-chain and readback modes cannot operate at maximum clock frequency. SDO timing specifications measured with load circuit, as shown in Figure 4.
3 SDO operates with a VDD of 3.0 V to 5.5 V.
DB15
DB0
SCLK
SYNC
DIN
ALTERNATIVELY, DATA MAY BE CLOCKED INTO INPUT SHIFT REGISTER ON RISING EDGE OF
SCLK AS DETERMINED BY CONTROL BITS. TIMING AS PER ABOVE, WITH SCLK INVERTED.
t1
t8
t4
t3
t2
t5
t6
t7
03162-002
Figure 2. Standalone Mode Timing Diagram
DB15 (N)
DB0 (N)
DB15
(N + 1)
DB0
(N + 1)
SCLK
SDIN
SDO
ALTERNATIVELY, DATA MAY BE CLOCKED INTO INPUT SHIFT REGISTER ON RISING EDGE OF SCLK AS
DETERMINED BY CONTROL BITS. IN THIS CASE, DATA WOULD BE CLOCKED OUT OF SDO ON FALLING
EDGE OF SCLK. TIMING AS PER ABOVE, WITH SCLK INVERTED.
t6
DB15(N)
DB0(N)
t1
t2
t5
t9
t6
t4
t3
t7
t8
SYNC
03162-003
Figure 3. Daisy-Chain and Readback Modes Timing Diagram
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相關代理商/技術參數(shù) |
參數(shù)描述 |
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| AD5426YRM-REEL | 功能描述:IC DAC 8BIT MULTIPLYING 10-MSOP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉換器 系列:- 產(chǎn)品培訓模塊:Data Converter Fundamentals DAC Architectures 設計資源:Unipolar, Precision DC Digital-to-Analog Conversion using AD5450/1/2/3 8-14-Bit DACs (CN0052) Precision, Bipolar, Configuration for AD5450/1/2/3 8-14bit Multiplying DACs (CN0053) AC Signal Processing Using AD5450/1/2/3 Current Output DACs (CN0054) Programmable Gain Element Using AD5450/1/2/3 Current Output DAC Family (CN0055) Single Supply Low Noise LED Current Source Driver Using a Current Output DAC in the Reverse Mode (CN0139) 標準包裝:10,000 系列:- 設置時間:- 位數(shù):12 數(shù)據(jù)接口:DSP，MICROWIRE?，QSPI?，串行，SPI? 轉換器數(shù)目:1 電壓電源:單電源 功率耗散（最大）:- 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:SOT-23-8 薄型，TSOT-23-8 供應商設備封裝:TSOT-23-8 包裝:帶卷 (TR) 輸出數(shù)目和類型:1 電流，單極；1 電流，雙極 采樣率（每秒）:2.7M |
| AD5426YRM-REEL7 | 制造商:Analog Devices 功能描述:DAC 1-CH R-2R 8-bit 10-Pin MSOP T/R 制造商:Analog Devices 功能描述:DAC 1CH R-2R 8BIT 10MSOP - Tape and Reel 制造商:Rochester Electronics LLC 功能描述:8-IOUT DAC WITH SERIAL ITF I.C. - Tape and Reel |
| AD5426YRMZ | 功能描述:IC DAC 8BIT MULTIPLYING 10MSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉換器 系列:- 產(chǎn)品培訓模塊:Data Converter Fundamentals DAC Architectures 標準包裝:3,000 系列:nanoDAC™ 設置時間:80µs 位數(shù):18 數(shù)據(jù)接口:DSP，MICROWIRE?，QSPI?，串行，SPI? 轉換器數(shù)目:1 電壓電源:單電源 功率耗散（最大）:- 工作溫度:-40°C ~ 105°C 安裝類型:表面貼裝 封裝/外殼:SOT-23-8 供應商設備封裝:SOT-23-8 包裝:帶卷 (TR) 輸出數(shù)目和類型:1 電壓，單極 采樣率（每秒）:- 產(chǎn)品目錄頁面:784 (CN2011-ZH PDF) 配用:EVAL-AD5680EBZ-ND - BOARD EVAL FOR AD5680 其它名稱:AD5680BRJZ-2REEL7TR |
| AD5426YRMZ | 制造商:Analog Devices 功能描述:8BIT DAC SERIAL I/F 5426 MSOP10 |
| AD5426YRMZ-REEL | 功能描述:IC DAC 8BIT MULTIPLYING 10MSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉換器 系列:- 產(chǎn)品培訓模塊:Data Converter Fundamentals DAC Architectures 設計資源:Unipolar, Precision DC Digital-to-Analog Conversion using AD5450/1/2/3 8-14-Bit DACs (CN0052) Precision, Bipolar, Configuration for AD5450/1/2/3 8-14bit Multiplying DACs (CN0053) AC Signal Processing Using AD5450/1/2/3 Current Output DACs (CN0054) Programmable Gain Element Using AD5450/1/2/3 Current Output DAC Family (CN0055) Single Supply Low Noise LED Current Source Driver Using a Current Output DAC in the Reverse Mode (CN0139) 標準包裝:10,000 系列:- 設置時間:- 位數(shù):12 數(shù)據(jù)接口:DSP，MICROWIRE?，QSPI?，串行，SPI? 轉換器數(shù)目:1 電壓電源:單電源 功率耗散（最大）:- 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:SOT-23-8 薄型，TSOT-23-8 供應商設備封裝:TSOT-23-8 包裝:帶卷 (TR) 輸出數(shù)目和類型:1 電流，單極；1 電流，雙極 采樣率（每秒）:2.7M |
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