參數(shù)資料
型號: AD5425YRM
廠商: ANALOG DEVICES INC
元件分類: DAC
英文描述: 8-Bit, High Bandwidth Multiplying DAC with Serial Interface
中文描述: SERIAL INPUT LOADING, 0.09 us SETTLING TIME, 8-BIT DAC, PDSO10
封裝: MO-187BA, MSOP-10
文件頁數(shù): 6/20頁
文件大?。?/td> 417K
代理商: AD5425YRM
REV. 0
–6–
AD5425
PIN CONFIGURATION
I
OUT
1
1
10
R
FB
SDIN
5
6
SYNC
SCLK
4
7
LDAC
GND
3
8
V
DD
I
OUT
2
2
9
V
REF
AD5425
(Not to Scale)
PIN FUNCTION DESCRIPTIONS
Pin No.
Mnemonic
Function
1
2
3
4
I
OUT
1
I
OUT
2
GND
SCLK
DAC Current Output.
DAC Analog Ground. This pin should normally be tied to the analog ground of the system.
Digital Ground Pin.
Serial Clock Input. Data is clocked into the input shift register on each falling edge of the serial clock input.
This device can accommodate clock rates of up to 50 MHz.
Serial Data Input. Data is clocked into the 8-bit input register on each falling edge of the serial clock input.
Active Low Control Input. This is the frame synchronization signal for the input data. When
SYNC
goes
low, it powers on the SCLK and DIN buffers and the input shift register is enabled. Data is transferred on
each falling edge of the following 8 clocks.
Load DAC Input. Updates the DAC output. The DAC is updated when this signal goes low or alternatively,
if this line is held permanently low, an automatic update mode is selected whereby the DAC is updated
after 8 SCLK falling edges with
SYNC
low.
Positive Power Supply Input. This part can be operated from a supply of 2.5 V to 5.5 V.
DAC Reference Voltage Input Terminal.
DAC Feedback Resistor Pin. Establishes voltage output for the DAC by connecting to external amplifier
output.
5
6
SDIN
SYNC
7
LDAC
8
9
V
DD
V
REF
R
FB
10
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