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參數(shù)資料
型號: AD539JDZ
廠商: Analog Devices Inc
文件頁數(shù): 17/21頁
文件大?。?/td> 0K
描述: IC MULT/DIV DUAL CH LIN 16-CDIP
標(biāo)準(zhǔn)包裝: 1
功能: 模擬乘法器/除法器
位元/級數(shù): 雙象限
封裝/外殼: 16-CDIP(0.300",7.62mm)
供應(yīng)商設(shè)備封裝: 16-CDIP 側(cè)面銅焊
包裝: 管件
AD539
Rev. B | Page 4 of 20
AD539J
AD539K
AD539S
Parameter
Test Conditions/Comments
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
CONTROL INPUT, VX
Nominal Full-Scale Input
3.0
V
Operational Range, Degraded
Performance
+3.2
V
500
Ω
Offset Voltage
1
1
1
mV
TMIN to TMAX
3
2
mV
Power Supply Sensitivity
30
μV/V
Gain
See
Absolute Gain Error
VX = 0.1 V to 3.0 V, VY = ±2 V
0.2
0.1
0.2
dB
TMIN to TMAX
VX = 0.1 V to 3.0 V, VY = ±2 V
0.3
0.15
0.25
dB
CURRENT OUTPUT2
Full-Scale Output Current
VX = 3 V, VY = ±2 V
±1
mA
Peak Output Current
VX = 3.3 V, VY = ±5 V,
VS = ±7.5 V
±2
±2.8
±2
±2.8
±2
±2.8
mA
Output Offset Current
VX = 0 V, VY = 0 V
0.2
1.51
0.2
0.2
μA
Output Offset Voltage3
See Figure 20, VX = 0 V,
VY = 0 V
3
3
3
mV
Output Resistance
1.2
Scaling Resistors
Channel 1
Z1, W1 to CH1
6
Channel 2
Z2, W2 to CH2
6
VOLTAGE OUTPUTS, VW1 AND VW23
See
Multiplier Transfer Function
Either Channel
VW = VX × VY/VU
VW = VX × VY/VU
VW = VX × VY/VU
Multiplier Scaling Voltage, VU
0.981
1.0
1.021
0.991
1.0
1.011
0.981
1.0
1.021
V
Accuracy
0.5
0.5
0.5
2
%
TMIN to TMAX
1
0.5
1.0
%
Power Supply Sensitivity
0.04
%/V
Total Multiplication Error4
VX ≤ 3 V, 2 V < VY < +2 V
1
2.5
0.6
1.5
1
% FSR
TMIN to TMAX
2
1
2
%
Control Feedthrough
VX = 0 V to 3 V, VY = 0 V
25
15
15
mV
TMIN to TMAX
30
15
60
mV
TEMPERATURE RANGE
Rated Performance
0
+70
0
+70
55
+125
°C
POWER SUPPLIES
Operational Range
±4.5
±15
±4.5
±15
±4.5
±15
V
Current Consumption
+VS
8.5
10.21
8.5
10.21
8.5
10.21
mA
VS
18.5
22.21
18.5
22.21
18.5
22.21
mA
1 Tested on all production units at final electrical test. Results from those tests are used to calculate outgoing quality levels.
2 Resistance value and absolute current outputs subject to 20% tolerance.
3 Specification assumes the external op amp is trimmed for negligible input offset.
4 Includes all errors.
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