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參數(shù)資料
| 型號： | AD538ACHIPS |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 運動控制電子 |
| 英文描述： | Real-Time Analog Computational Unit ACU |
| 中文描述： | ANALOG MULTIPLE FUNCTIONS, 0.4 MHz BAND WIDTH, UUC18 |
| 封裝： | DIE |
| 文件頁數(shù)： | 3/11頁 |
| 文件大?。?/td> | 167K |
| 代理商： | AD538ACHIPS |
AD538
–3–
REV. C
RE-EXAMINATION OF MULTIPLIER/DIVIDER
ACCURACY
Traditionally, the “accuracy” (actually the errors) of analog
multipliers and dividers have been specified in terms of percent
of full scale. Thus specified, a 1% multiplier error with a 10 V
full-scale output would mean a worst case error of +100 mV at
“any” level within its designated output range. While this type
of error specification is easy to test evaluate, and interpret, it can
leave the user guessing as to how useful the multiplier actually is
at low output levels, those approaching the specified error limit
(in this case) 100 mV.
The AD538’s error sources do not follow the percent of full-
scale approach to specification, thus it more optimally fits the
needs of the very wide dynamic range applications for which it is
best suited. Rather than as a percent of full scale, the AD538’s
error as a multiplier or divider for a 100:1 (100 mV to 10 V)
input range is specified as the sum of two error components: a
percent of reading (ideal output) term plus a fixed output offset.
Following this format the AD538AD, operating as a multiplier
or divider with inputs down to 100 mV, has a maximum error of
±
1% of reading
±
500
μ
V. Some sample total error calculations
for both grades over the 100:1 input range are illustrated in the
chart below. This error specification format is a familiar one to
designers and users of digital voltmeters where error is specified
as a percent of reading
±
a certain number of digits on the meter
readout.
For operation as a multiplier or divider over a wider dynamic
range (>100:1), the AD538 has a more detailed error specifica-
tion that is the sum of three components: a percent of reading
term, an output offset term and an input offset term for the
V
Y
/V
X
log ratio section. A sample application of this specifica-
tion, taken from Table I, for the AD538AD with V
Y
= 1 V, V
Z
=
100 mV and V
X
= 10 mV would yield a maximum error of
±
2.0% of reading
±
500
μ
V
±
(1 V + 100 mV)/10 mV
×
250
μ
V
or
±
2.0% of reading
±
500
μ
V
±
27.5 mV. This example illus-
trates that with very low level inputs the AD538’s incremental
gain (V
Y
+ V
Z
)/V
X
has increased to make the input offset contri-
bution to error substantial.
Table I. Sample Error Calculation Chart (Worst Case)
V
Y
Input
(in V)
V
Z
Input
(in V)
V
X
Input
(in V)
Ideal
Output
(in V)
Total Offset
Error Term
(in mV)
% of Reading
Error Term
(in mV)
Total Error
Summation
(in mV)
Total Error Summation
as a % of the Ideal
Output
100:1
INPUT
RANGE
10
10
10
10
0.5
0.25
(AD)
(BD)
100 (AD)
50
(BD)
100.5 (AD)
50.25 (BD)
1.0
0.5
(AD)
(BD)
Total Error =
±
% rdg
±
Output V
OS
10
0.1
0.1
10
0.5
0.25
(AD)
(BD)
100 (AD)
50
(BD)
100.5 (AD)
50.25 (BD)
1.0
0.5
(AD)
(BD)
1
1
1
1
0.5
0.25
(AD)
(BD)
10
5
(AD)
(BD)
10.5
5.25
(AD)
(BD)
1.05 (AD)
0.5
(BD)
0.1
0.1
0.1
0.1
0.5
0.25
(AD)
(BD)
1
0.5 (BD)
(AD)
1.5
0.75
(AD)
(BD)
1.5
0.75 (BD)
(AD)
WIDE
1
0.10
0.01
10
28
16.75 (BD)
(AD)
200 (AD)
100 (BD)
228
116.75(BD)
(AD)
2.28 (AD)
1.17 (BD)
DYNAMIC
RANGE
Total Error =
±
% rdg
±
Output V
OS
±
Input V
OS
×
(V
Y
+ V
Z
)/V
X
10
0.05
2
0.25
1.76
1
(AD)
(BD)
5
2.5 (BD)
(AD)
6.76
3.5
(AD)
(BD)
2.7
1.4
(AD)
(BD)
5
0.01
0.01
5
125.75 (AD)
75.4
100 (AD)
50
(BD)
225.75(AD)
125.4 (BD)
4.52 (AD)
2.51 (BD)
(BD)
10
0.01
0.1
1
25.53 (AD)
15.27 (BD)
20
10
(AD)
(BD)
45.53 (AD)
25.27 (BD)
4.55 (AD)
2.53 (BD)
相關PDF資料 |
PDF描述 |
|---|---|
| AD539 | AD539: Wideband Dual-Channel Linear Multiplier/Divider Data Sheet (Rev. A. 12/91) |
| AD539KN | Wideband Dual-Channel Linear Multiplier/Divider |
| AD539JCHIP | DIODE ZENER SINGLE 200mW 8.2Vz 20mA-Izt 0.05 3uA-Ir 6.5 SOT-323 3K/REEL |
| AD539JD | DIODE ZENER SINGLE 350mW 8.7Vz 20mA-Izt 0.05 3uA-Ir 6.5 SOT-23 3K/REEL |
| AD539JN | DIODE ZENER DUAL ISOLATED 200mW 8.7Vz 20mA-Izt 0.05 3uA-Ir 6.5 SOT-363 3K/REEL |
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| AD538AD | 功能描述:IC MULT/DIV REALTIME ACU 18-CDIP RoHS:否 類別:集成電路 (IC) >> 線性 - 模擬乘法器，除法器 系列:- 標準包裝:25 系列:HA 功能:模擬乘法器 位元/級數(shù):四象限 封裝/外殼:16-CDIP（0.300"，7.62mm） 供應商設備封裝:16-CDIP 側面銅焊 包裝:管件 |
| AD538ADZ | 功能描述:IC REALTIME ACU UNIT 18-CDIP RoHS:是 類別:集成電路 (IC) >> 線性 - 模擬乘法器，除法器 系列:- 標準包裝:25 系列:HA 功能:模擬乘法器 位元/級數(shù):四象限 封裝/外殼:16-CDIP（0.300"，7.62mm） 供應商設備封裝:16-CDIP 側面銅焊 包裝:管件 |
| AD538BD | 功能描述:IC MULT/DIV REALTIME ACU 18-CDIP RoHS:否 類別:集成電路 (IC) >> 線性 - 模擬乘法器，除法器 系列:- 標準包裝:25 系列:HA 功能:模擬乘法器 位元/級數(shù):四象限 封裝/外殼:16-CDIP（0.300"，7.62mm） 供應商設備封裝:16-CDIP 側面銅焊 包裝:管件 |
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| AD538SD | 功能描述:IC MULT/DIV REALTIME ACU 18-CDIP RoHS:否 類別:集成電路 (IC) >> 線性 - 模擬乘法器，除法器 系列:- 標準包裝:25 系列:HA 功能:模擬乘法器 位元/級數(shù):四象限 封裝/外殼:16-CDIP（0.300"，7.62mm） 供應商設備封裝:16-CDIP 側面銅焊 包裝:管件 |
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