參數(shù)資料
型號(hào)： AD5384BBC-5
廠(chǎng)商： ANALOG DEVICES INC
元件分類(lèi)： DAC
英文描述： 32-Channel, 3 V/5 V, Single-Supply, 14-Bit, Voltage Output DAC
中文描述： SERIAL INPUT LOADING, 8 us SETTLING TIME, 14-BIT DAC, PBGA100
封裝： 10 X 10 MM, MO-205AC, CSPBGA-100
文件頁(yè)數(shù)： 21/40頁(yè)
文件大小： 616K
代理商： AD5384BBC-5
AD5382
FUNCTIONAL DESCRIPTION
DAC ARCHITECTURE—GENERAL
The AD5382 is a complete, single-supply, 32-channel voltage
output DAC that offers 14-bit resolution. The part is available in
a 100-lead LQFP package and features both a parallel and a
serial interface. This product includes an internal, software
selectable, 1.25 V/2.5 V, 10 ppm/°C reference that can be used to
drive the buffered reference inputs; alternatively, an external
reference can be used to drive these inputs. Internal/external
reference selection is via the CR10 bit in the control register;
CR12 selects the reference magnitude if the internal reference is
selected. All channels have an on-chip output amplifier with
rail-to-rail output capable of driving 5 k in parallel with a
200 pF load.
Rev. 0 | Page 21 of 40
0
V
OUT
R
R
14-BIT
DAC
DAC
REG
m REG
c REG
×1 INPUT
REG
×2
INPUT DATA
V
REF
AVDD
Figure 27. Single-Channel Architecture
The architecture of a single DAC channel consists of a 14-bit
resistor-string DAC followed by an output buffer amplifier
operating at a gain of 2. This resistor-string architecture
guarantees DAC monotonicity. The 14-bit binary digital code
loaded to the DAC register determines at what node on the
string the voltage is tapped off before being fed to the output
amplifier. Each channel on these devices contains independent
offset and gain control registers that allow the user to digitally
trim offset and gain. These registers give the user the ability to
calibrate out errors in the complete signal chain, including the
DAC, using the internal m and c registers, which hold the
correction factors. All channels are double buffered, allowing
synchronous updating of all channels using the LDAC pin.
Figure 27 shows a block diagram of a single channel on the
AD5382. The digital input transfer function for each DAC can
be represented as
x2
= [(
m
+ 2)/ 2
n
×
x1
] + (
c
– 2
n
– 1
)
where:
x2
is the data-word loaded to the resistor string DAC.
x1
is the 14-bit data-word written to the DAC input register.
m
is the gain coefficient (default is 0x3FFE on the AD5382).
The gain coefficient is written to the 13 most significant bits
(DB13 to DB1) and LSB (DB0) is a zero.
n
= DAC resolution (
n
= 14 for AD5382).
c
is the14-bit offset coefficient (default is 0x2000).
The complete transfer function for these devices can be
represented as
V
OUT
= 2 ×
V
REF
×
x2
/2
n
x2
is the data-word loaded to the resistor string DAC.
V
REF
is the
internal reference voltage or the reference voltage externally
applied to the DAC REFOUT/REFIN pin. For specified
performance, an external reference voltage of 2.5 V is
recommended for the AD5380-5, and 1.25 V for the AD5380-3.
DATA DECODING
The AD5382 contains a 14-bit data bus, DB13–DB0. Depending
on the value of REG1 and REG0 (see Table 11), this data is
loaded into the addressed DAC input registers, offset (c)
registers, or gain (m) registers. The format data, offset (c), and
gain (m) register contents are shown in Table 12 to Table 14.
Table 11. Register Selection
REG1
REG0
Register Selected
1
1
Input Data Register (x1)
1
0
Offset Register (c)
0
1
Gain Register (m)
0
0
Special Function Registers (SFRs)
Table 12. DAC Data Format (REG1 = 1, REG0 = 1)
DB13 to DB0
11
1111
1111
1111
11
1111
1111
1110
10
0000
0000
0001
10
0000
0000
0000
01
1111
1111
1111
00
0000
0000
0001
00
0000
0000
0000
DAC Output (V)
2 V
REF
× (16383/16384)
2 V
REF
× (16382/16384)
2 V
REF
× (8193/16384)
2 V
REF
× (8192/16384)
2 V
REF
× (8191/16384)
2 V
REF
× (1/16384)
0
Table 13. Offset Data Format (REG1 = 1, REG0 = 0)
DB13 to DB0
11
1111
1111
1111
11
1111
1111
1110
10
0000
0000
0001
10
0000
0000
0000
01
1111
1111
1111
00
0000
0000
0001
00
0000
0000
0000
Offset (LSB)
+8191
+8190
+1
0
–1
–8191
–8192
Table 14. Gain Data Format (REG1 = 0, REG0 = 1)
DB13 to DB0
11
1111
1111
10
1111
1111
01
1111
1111
00
0111
1111
00
0000
0000
Gain Factor
1
0.75
0.5
0.25
0
1110
1110
1110
1110
0000
相關(guān)PDF資料
PDF描述
AD5390BCP-3-REEL 8-/16-Channel, 3 V/5 V, Serial Input, Single- Supply, 12-/14-Bit Voltage Output DACs
AD5391BCP-3-REEL 8-/16-Channel, 3 V/5 V, Serial Input, Single- Supply, 12-/14-Bit Voltage Output DACs
AD5391BST-3 8-/16-Channel, 3 V/5 V, Serial Input, Single- Supply, 12-/14-Bit Voltage Output DACs
AD5391BST-5 8-/16-Channel, 3 V/5 V, Serial Input, Single- Supply, 12-/14-Bit Voltage Output DACs
AD5391BST-5-REEL 8-/16-Channel, 3 V/5 V, Serial Input, Single- Supply, 12-/14-Bit Voltage Output DACs
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD5384BBC-5REEL7 功能描述:IC DAC 14BIT 40CH 5V 100-CSPBGA RoHS:否 類(lèi)別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:2,400 系列:- 設(shè)置時(shí)間:- 位數(shù):18 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:3 電壓電源:模擬和數(shù)字 功率耗散（最大）:- 工作溫度:-40°C ~ 85°C 安裝類(lèi)型:表面貼裝 封裝/外殼:36-TFBGA 供應(yīng)商設(shè)備封裝:36-TFBGA 包裝:帶卷 (TR) 輸出數(shù)目和類(lèi)型:* 采樣率（每秒）:*
AD5384BBCZ-3 功能描述:IC DAC 14BIT 40CH 5V 100-CSPBGA RoHS:是 類(lèi)別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:2,400 系列:- 設(shè)置時(shí)間:- 位數(shù):18 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:3 電壓電源:模擬和數(shù)字 功率耗散（最大）:- 工作溫度:-40°C ~ 85°C 安裝類(lèi)型:表面貼裝 封裝/外殼:36-TFBGA 供應(yīng)商設(shè)備封裝:36-TFBGA 包裝:帶卷 (TR) 輸出數(shù)目和類(lèi)型:* 采樣率（每秒）:*
AD5384BBCZ-5 功能描述:IC DAC 14BIT 40CH 5V 100-CSPBGA RoHS:是 類(lèi)別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:2,400 系列:- 設(shè)置時(shí)間:- 位數(shù):18 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:3 電壓電源:模擬和數(shù)字 功率耗散（最大）:- 工作溫度:-40°C ~ 85°C 安裝類(lèi)型:表面貼裝 封裝/外殼:36-TFBGA 供應(yīng)商設(shè)備封裝:36-TFBGA 包裝:帶卷 (TR) 輸出數(shù)目和類(lèi)型:* 采樣率（每秒）:*
AD5384BBCZ-5REEL7 功能描述:14 Bit Digital to Analog Converter 40 100-CSBGA (10x10) 制造商:analog devices inc. 系列:denseDAC 包裝:帶卷（TR） 零件狀態(tài):有效 位數(shù):14 數(shù)模轉(zhuǎn)換器數(shù):40 建立時(shí)間:8μs 輸出類(lèi)型:Voltage - Buffered 差分輸出:無(wú) 數(shù)據(jù)接口:I2C，SPI，DSP 參考類(lèi)型:外部， 內(nèi)部 電壓 - 電源，模擬:5V 電壓 - 電源，數(shù)字:2.7 V ~ 5.5 V INL/DNL（LSB）:±4（最大），-1/+2（最大） 架構(gòu):電阻串 DAC 工作溫度:-40°C ~ 85°C 封裝/外殼:100-LFBGA，CSPBGA 供應(yīng)商器件封裝:100-CSBGA（10x10） 標(biāo)準(zhǔn)包裝:400
AD538AD 功能描述:IC MULT/DIV REALTIME ACU 18-CDIP RoHS:否 類(lèi)別:集成電路 (IC) >> 線(xiàn)性 - 模擬乘法器，除法器 系列:- 標(biāo)準(zhǔn)包裝:25 系列:HA 功能:模擬乘法器 位元/級(jí)數(shù):四象限 封裝/外殼:16-CDIP（0.300"，7.62mm） 供應(yīng)商設(shè)備封裝:16-CDIP 側(cè)面銅焊 包裝:管件
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠(chǎng)商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*