參數(shù)資料
型號(hào)： AD5383BST-5
廠商： ANALOG DEVICES INC
元件分類： DAC
英文描述： 32-Channel, 3 V/5 V, Single-Supply, 14-Bit, Voltage Output DAC
中文描述： PARALLEL, WORD INPUT LOADING, 6 us SETTLING TIME, 12-BIT DAC, PQFP100
封裝： 14 X 14 MM, MO-026BED, LQFP-100
文件頁(yè)數(shù)： 16/40頁(yè)
文件大小： 616K
代理商： AD5383BST-5
AD5382
Mnemonic
FIFOEN
Rev. 0 | Page 16 of 40
Function
FIFO Enable (Level Sensitive, Active High). When connected to DVDD, the internal FIFO is enabled, allowing the user
to write to the device at full speed. FIFO is only available in parallel interface mode. The status of the FIFO_EN pin is
sampled on power-up, and also following a CLEAR or RESET, to determine if the FIFO is enabled. In either serial or I
2
C
interface modes, the FIFO_EN pin should be tied low.
Multifunction Input Pin. In parallel interface mode, this pin acts as DB11 of the parallel input data-word. In serial
interface mode, this pin acts as serial interface mode select. When serial interface mode is selected (SER/PAR = 1) and
this input is low, SPI mode is selected. In SPI mode, DB12 is the serial clock (SCLK) input and DB13 is the serial data
(DIN) input.
When serial interface mode is selected (SER/PAR = 1) and this input is high I
2
C Mode is selected. In this mode, DB12 is
the serial clock (SCL) input and DB13 is the serial data (SDA) input.
Multifunction Input Pin. In parallel interface mode, this pin acts as DB12 of the parallel input data-word. In serial
interface mode, this pin acts as a serial clock input.
Serial Interface Mode. In serial interface mode, data is clocked into the shift register on the falling edge of SCLK. This
operates at clock speeds up to 50 MHz.
I
2
C Mode. In I
2
C mode, this pin performs the SCL function, clocking data into the device. The data transfer rate in I
2
C
mode is compatible with both 100 kHz and 400 kHz operating modes.
Multifunction Data Input Pin. In parallel interface mode, this pin acts as DB13 of the parallel input data-word.
Serial Interface Mode. In serial interface mode, this pin acts as the serial data input. Data must be valid on the falling
edge of SCLK.
I
2
C Mode. In I
2
C mode, this pin is the serial data pin (SDA) operating as an open-drain input/output.
No Connect. The user is advised not to connect any signals to these pins.
DB11 (SPI/I2C)
DB12 (SCLK/SCL)
DB13/(DIN/SDA)
NC
相關(guān)PDF資料
PDF描述
AD5383 32-Channel, 3 V/5 V, Single-Supply, 12-Bit, Voltage Output DAC
AD5383BST-3-REEL 32-Channel, 3 V/5 V, Single-Supply, 12-Bit, Voltage Output DAC
AD5383BST-5-REEL 32-Channel, 3 V/5 V, Single-Supply, 12-Bit, Voltage Output DAC
AD5384BBC-3 32-Channel, 3 V/5 V, Single-Supply, 14-Bit, Voltage Output DAC
AD5384BBC-5 32-Channel, 3 V/5 V, Single-Supply, 14-Bit, Voltage Output DAC
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