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參數(shù)資料
| 型號(hào)： | AD53522 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | High Speed Dual Pin Electronic |
| 中文描述： | 高速雙引腳電子 |
| 文件頁數(shù)： | 3/12頁 |
| 文件大?。?/td> | 158K |
| 代理商： | AD53522 |
REV. A
–3–
AD53522
DRIVER
1
(continued)
Spec
No.
Spec
3
Perf
Parameter
Conditions
Min
Typ
2
Max
Unit
VTERM
Voltage Range
60
Term Mode, VTERM = –0.3 V
to +6.3 V, VL = 0 V, VH = +3 V
(VTERM Meets Test 61, 62, and 63 specs)
Term Mode, VTERM = 0 V,
VL = 0 V, VH = +3 V
Term Mode, VTERM = –0.3 V
to +6.3 V, VL = 0 V, VH = +3 V
Term Mode, VTERM = –0.3 V
to +6.3 V, VL = 0 V, VH = +3 V
VTERM = 0 V, VL = 0 V, VH = +3 V
I
OUT
= +30 mA, –1 mA,
VTERM = –0.3 V, VH = +3 V, VL = 0 V
I
OUT
= –30 mA, +1 mA,
VTERM =+6.3 V, VH = +3 V, VL = 0 V
I
OUT
=
±
30 mA,
±
1 mA,
VTERM = +2.5 V, VH = +3 V, VL = 0 V
+V
S
, –V
S
±
1%
Output to –0.3 V, VTERM = +6.3 V
Output to +6.3 V, VTERM = –0.3 V
–0.3
+6.3
V
P
61
VTERM Offset
–50
+50
mV
P
62
VTERM Gain Error
–0.3
+0.3
% of V
SET
P
63
VTERM Linearity Error
4
–5
+5
mV
P
64
70
Offset Temperature Coefficient
Output Resistance DC
+0.5
mV/
°
C
N
+46
+50
N
N
P
N
P
P
72
73
74
PSRR, Drive, or Term Mode
Static Current Limit
Static Current Limit
DYNAMIC PERFORMANCE, DRIVE (VH and VL)
Propagation Delay Time
+17.8
mV/V
mA
mA
–120
+60
–60
+120
80
Measured at 50%, VL = 0 V,
VH = 3 V, into 500
Measured at 50%, VL = 0 V,
VH = 3 V, into 500
Measured at 50%, VL = 0 V,
VH = 3 V, into 500
1.25
1.4
1.55
ns
P
81
Propagation Delay T.C.
2
ps/
°
C
N
82
Delay Matching, Edge-to-Edge
200
ps
P
RISE AND FALL TIMES
200 mV Swing
90
Measured 20%–80%, VL = –0.1 V,
VH = +0.1 V, into 50
Measured 20%–80%, VL = 0 V,
VH = 1 V, into 50
Measured 10%–90%, VL = 0 V,
VH = 3 V, into 50
Measured 10%–90%, VL = 0 V,
VH = 3 V, into 500
Measured 20%–80%, VL = 0 V,
VH = 3 V, into 500
Measured 10%–90%, VL = 0 V,
VH = 5 V, into 500
0.25
ns
N
91
1 V Swing
0.3
ns
N
92
3 V Swing
0.8
ns
N
93
3 V Swing
0.8
ns
N
93A
3 V Swing
0.450
0.560
0.670
ns
P
94
5 V Swing
1.2
1.5
ns
N
RISE AND FALL TIME TEMPERATURE COEFFICIENT
1 V Swing
3 V Swing
5 V Swing
Overshoot and Preshoot
100
101
102
110
(Per Test 91)
(Per Test 92)
(Per Test 94)
VL, VH = –0.1 V, +0.1 V,
Driver Terminated into 50
VL, VH = 0.0 V, 3 V,
Driver Terminated into 50
±
2
±
2
±
4
ps/
°
C
ps/
°
C
ps/
°
C
% of Step N
+ mV
N
N
N
0 – 50
0 + 50
–6.0 – 50
+6.0 + 50 % of Step N
+ mV
SETTLING TIME
to 15 mV
120
VL = 0 V, VH = 0.5 V,
Driver Terminated into 50
VL = 0 V, VH = 0.5 V
VL/VH = 0/3, PW = 2.5 ns/7.5 ns,
30 ns/90 ns, DC = 25%
VL = 0 V, VH = 3 V, Duty Cycle
(DC) 5% to 95%, T = 40 ns
50
ns
N
121
130
to 4 mV
Delay Change vs. Pulse Width
10
25
μ
s
ps
N
N
75
131
Delay Change vs. Duty Cycle
25
ps
N
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