VDD – Volts ERROR – % 0.2 –0." />
參數(shù)資料
型號: AD5334BRUZ
廠商: Analog Devices Inc
文件頁數(shù): 4/20頁
文件大小: 0K
描述: IC DAC 8BIT QUAD VOUT 24-TSSOP
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
標(biāo)準(zhǔn)包裝: 62
設(shè)置時間: 6µs
位數(shù): 8
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 4
電壓電源: 單電源
功率耗散(最大): 4.5mW
工作溫度: -40°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: 24-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 24-TSSOP
包裝: 管件
輸出數(shù)目和類型: 4 電壓,單極;4 電壓,雙極
采樣率(每秒): 167k
產(chǎn)品目錄頁面: 782 (CN2011-ZH PDF)
REV. 0
AD5334/AD5335/AD5336/AD5344
–12–
GAIN ERROR
VDD – Volts
ERROR
%
0.2
–0.6
01
3
0
–0.4
TA = 25 C
VREF = 2V
46
–0.5
–0.3
–0.2
–0.1
0.1
25
OFFSET ERROR
Figure 14. Offset Error and Gain
Error vs. VDD
0
TA = 25 C
I DD
A
VDD – V
2.5
3.0
3.5
4.0
4.5
5.0
5.5
100
200
300
400
500
600
Figure 17. Supply Current vs. Supply
Voltage
VOUTA
5s
CH1
CH2
LDAC
TA = 25 C
VDD = 5V
VREF = 5V
CH1 1V, CH2 5V, TIME BASE= 1 s/DIV
Figure 20. Half-Scale Settling (1/4 to
3/4 Scale Code Change)
5V SOURCE
SINK/SOURCE CURRENT – mA
V
OUT
Volts
5
0
01
3
4
46
1
2
3
25
3V SOURCE
3V SINK
5V SINK
Figure 15. VOUT Source and Sink
Current Capability
0
2.5
I DD
A
VDD – V
3.0
3.5
4.0
4.5
5.0
5.5
0.1
0.2
0.3
0.4
0.5
TA = 25 C
Figure 18. Power-Down Current vs.
Supply Voltage
VDD
CH1
CH2
VOUTA
TA = 25 C
VDD = 5V
VREF = 2V
CH1 2V, CH2 200mV, TIME BASE = 200 s/DIV
Figure 21. Power-On Reset to 0 V
0
ZERO-SCALE
FULL SCALE
DAC CODE
I DD
A
VDD = 5.5V
VDD = 3.6V
100
200
300
400
500
600
TA = 25 C
VREF = 2V
Figure 16. Supply Current
vs. DAC Code
VLOGIC – V
I DD
A
200
0
1
234
5
400
600
800
1000
1200
1400
1600
1800
VDD = 5V
VDD = 3V
Figure 19. Supply Current
vs. Logic Input Voltage
CH1 500mV, CH2 5V, TIME BASE = 1 s/DIV
CH1
CH2
TA = 25 C
VDD = 5V
VREF = 2V
VOUTA
PD
Figure 22. Exiting Power-Down
to Midscale
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