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參數(shù)資料
| 型號： | AD532KHZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 5/17頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MULTIPLIER TRIMMED TO-100-10 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 功能： | 模擬乘法器/除法器 |
| 位元/級數(shù)： | 四象限 |
| 封裝/外殼： | TO-100-10 金屬罐 |
| 供應(yīng)商設(shè)備封裝： | TO-100-10 |
| 包裝： | 管件 |
AD532
Rev. D | Page 12 of 16
APPLICATIONS
The performance and ease of use of the AD532 is achieved
through the laser trimming of thin-film resistors deposited
directly on the monolithic chip. This trimming-on-the-chip
technique provides a number of significant advantages in terms
of cost, reliability and flexibility over conventional in-package
trimming of off-the-chip resistors mounted or deposited on a
hybrid substrate.
First and foremost, trimming on the chip eliminates the need
for a hybrid substrate and the additional bonding wires that are
required between the resistors and the multiplier chip. By trimming
more appropriate resistors on the AD532 chip itself, the second
input terminals that were once committed to external trimming
networks have been freed to allow fully differential operation at
both the X and Y inputs. Further, the requirement for an input
attenuator to adjust the gain at the Y input has been eliminated,
letting the user take full advantage of the high input impedance
properties of the input differential amplifiers. Therefore, the
AD532 offers greater flexibility for both algebraic computation
and transducer instrumentation applications.
Finally, provision for fine trimming the output voltage offset has
been included. This connection is optional, however, as the AD532
has been factory-trimmed for total performance as described in
the listed specifications.
REPLACING OTHER IC MULTIPLIERS
Existing designs using IC multipliers that require external
trimming networks can be simplified using the pin-for-pin
replaceability of the AD532 by merely grounding the X2, Y2 and
VOS terminals. The VOS terminal should always be grounded
when unused.
Multiplication
Z
OUT
AD532
X1
X2
Y1
Y2
VOUT
VOS
20k
+VS
–VS
VOUT =
(X1 – X2) (Y1 – Y2)
10V
(OPTIONAL)
00502-
013
Figure 15. Multiplier Connection
For operation as a multiplier, the AD532 should be connected
as shown in Figure 15. The inputs can be fed differentially to the
X and Y inputs, or single-ended by simply grounding the
unused input. Connect the inputs according to the desired
polarity in the output. The Z terminal is tied to the output to
close the feedback loop around the op amp (see Figure 1). The
offset adjust VOS is optional and is adjusted when both inputs
are zero volts to obtain zero out, or to buck out other system
offsets.
Squaring
AD532
X1
X2
Y1
Y2
VOUT
20k
+VS
–VS
+VS
–VS
VOS
VOUT =
VIN2
10V
(OPTIONAL)
Z
OUT
VIN
00502-
014
Figure 16. Squarer Connection
The squaring circuit in Figure 16 is a simple variation of the
multiplier. The differential input capability of the AD532,
however, can be used to obtain a positive or negative output
response to the input, a useful feature for control applications,
as it might eliminate the need for an additional inverter
somewhere else.
Division
AD532
20k
(X0)
47k
2.2k
10k
1k
(SF)
+VS
–VS
+VS
–VS
VOUT =
10VZ
X
Z
OUT
Z
VOUT
X
X1
X2
Y1
Y2
00502-
015
Figure 17. Divider Connection
The AD532 can be configured as a two-quadrant divider by
connecting the multiplier cell in the feedback loop of the op
amp and using the Z terminal as a signal input, as shown in
Figure 17. It should be noted, however, that the output error is
given approximately by 10 V εm/(X1 X2), where εm is the total
error specification for the multiply mode; and bandwidth by
fm × (X1 X2)/10 V, where fm is the bandwidth of the multiplier.
Further, to avoid positive feedback, the X input is restricted to
negative values. Thus, for single-ended negative inputs (0 V to
10 V), connect the input to X and the offset null to X2; for
single-ended positive inputs (0 V to +10 V), connect the input
to X2 and the offset null to X1. For optimum performance, gain
(S.F.) and offset (X0) adjustments are recommended as shown
and explained in Table 6.
For practical reasons, the useful range in denominator input is
approximately 500 mV ≤ |(X1 X2)| ≤ 10 V. The voltage offset
adjust (VOS), if used, is trimmed with Z at zero and (X1 X2) at
full scale.
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相關(guān)代理商/技術(shù)參數(shù) |
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| AD532S | 制造商:AD 制造商全稱:Analog Devices 功能描述:Internally Trimmed Integrated Circuit Multiplier |
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| AD532SCHIPS | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog Multiplier/Divider |
| AD532SD | 功能描述:IC MULTIPLIER +/-10V 14-CDIP RoHS:否 類別:集成電路 (IC) >> 線性 - 模擬乘法器，除法器 系列:- 標(biāo)準(zhǔn)包裝:25 系列:HA 功能:模擬乘法器 位元/級數(shù):四象限 封裝/外殼:16-CDIP（0.300"，7.62mm） 供應(yīng)商設(shè)備封裝:16-CDIP 側(cè)面銅焊 包裝:管件 |
| AD532SD/883B | 功能描述:增效器/分頻器 MULTIPLIER/DIVIDER IC RoHS:否 制造商:Texas Instruments 產(chǎn)品:Multiplier 邏輯系列: 工作電源電壓: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:PDIP-14 |
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