參數(shù)資料
型號： AD5313ARUZ
廠商： Analog Devices Inc
文件頁數(shù)： 14/28頁
文件大小： 0K
描述： IC DAC 10BIT DUAL R-R 16-TSSOP
產(chǎn)品培訓模塊： Data Converter Fundamentals
DAC Architectures
標準包裝： 96
設置時間： 7µs
位數(shù)： 10
數(shù)據(jù)接口： 串行
轉(zhuǎn)換器數(shù)目： 2
電壓電源： 單電源
功率耗散（最大）： 2.5mW
工作溫度： -40°C ~ 105°C
安裝類型： 表面貼裝
封裝/外殼： 16-TSSOP（0.173"，4.40mm 寬）
供應商設備封裝： 16-TSSOP
包裝： 管件
輸出數(shù)目和類型： 2 電壓，單極；2 電壓，雙極
采樣率（每秒）： 143k
產(chǎn)品目錄頁面： 782 (CN2011-ZH PDF)
AD5303/AD5313/AD5323
Rev. B | Page 21 of 28
APPLICATIONS INFORMATION
TYPICAL APPLICATION CIRCUIT
The AD5303/AD5313/AD5323 can be used with a wide range
of reference voltages, especially if the reference inputs are con-
figured to be unbuffered, in which case the devices offer a full,
one-quadrant multiplying capability over a reference range of
0 V to VDD.
More typically, the AD5303/AD5313/AD5323 may be used
with a fixed precision reference voltage. Figure 39 shows a
typical setup for the AD5303/AD5313/AD5323 when using
an external reference. If the reference inputs are unbuffered,
the reference input range is from 0 V to VDD, but if the on-chip
reference buffers are used, the reference range is reduced. Suit-
able references for 5 V operation are the AD780 and REF192
(2.5 V references). For 2.5 V operation, a suitable external
reference is the REF191, a 2.048 V reference.
SCLK
DIN
GND
AD5303/AD5313/
AD5323
SERIAL
INTERFACE
EXT
REF
00
47
2-
03
9
AD780/REF192
WITH VDD = 5V
OR REF191 WITH
VDD = 2.5V
VOUT
SYNC
VOUTA
VOUTB
VREFA
VREFB
1F
VDD = 2.5V to 5.5V
VDD
BUF A BUF B
Figure 39. AD5303/AD5313/AD5323 Using External Reference
If an output range of 0 V to VDD is required when the reference
inputs are configured as unbuffered (for example, 0 V to 5 V),
the simplest solution is to connect the reference inputs to VDD.
As this supply may not be very accurate and may be noisy, the
AD5303/AD5313/AD5323 can be powered from the reference
voltage, for example, using a 5 V reference such as the REF195,
as shown in Figure 40. The REF195 outputs a steady supply
voltage for the AD5303/AD5313/AD5323. The supply current
required from the REF195 is 300 μA and approximately 30 μA
or 60 μA into each of the reference inputs (if unbuffered). This
is with no load on the DAC outputs. When the DAC outputs are
loaded, the REF195 also needs to supply the current to the
loads. The total current required (with a 10 kΩ load on each
output) is
360 μA + 2(5 V/10 kΩ) = 1.36 mA
The load regulation of the REF195 is typically 2 ppm/mA, which
results in an error of 2.7 ppm (13.5 μV) for the 1.36 mA current
drawn from it. This corresponds to a 0.0007 LSB error at eight
bits and 0.011 LSB error at 12 bits.
SCLK
DIN
AD5303/AD5313/
AD5323
SERIAL
INTERFACE
REF195
00
47
2-
0
40
OUTPUT
SYNC
VOUTA
VOUTB
VDD
VREFA
1F
15V
GND
VS
VREFB
0.1F
10F
GND BUF A BUF B
Figure 40. Using an REF195 as Power and Reference to the
AD5303/AD5313/AD5323
BIPOLAR OPERATION USING THE AD5303/
AD5313/AD5323
The AD5303/AD5313/AD5323 have been designed for single-
supply operation, but bipolar operation is also achievable using
the circuit shown in Figure 41. The circuit shown has been con-
figured to achieve an output voltage range of 5 V < VOUT < +5 V.
Rail-to-rail operation at the amplifier output is achievable using
an AD820 or OP295 as the output amplifier.
SCLK
DIN
AD5303/AD5313/
AD5323
SERIAL
INTERFACE
REF195
00
47
2-
04
1
SYNC
VOUTA/B
VREFA/B
1F
GND
6V to 16V
0.1F
10F
VDD
VDD = 5V
+5V
–5V
R2
10k
AD820/
OP295
R1
10k
±5V
GND BUF A BUF B
OUTPUT
VS
Figure 41. Bipolar Operation Using the AD5303/AD5313/AD5323
The output voltage for any input code can be calculated as
follows:
[
])
/
(
/
)
(
)
2
/
(
)
(
R1
R2
V
R1
R2
R1
D
V
REF
N
REF
OUT
×
+
×
=
where:
D is the decimal equivalent of the code loaded to the DAC.
N is the DAC resolution.
VREF is the reference voltage input, and gain bit = 0, with
VREF = 5 V
R1 = R2 = 10 kΩ and VDD = 5 V,
V
D
V
N
OUT
5
)
2
/
10
(
×
=
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