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參數(shù)資料
| 型號： | AD526AD |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 運動控制電子 |
| 英文描述： | Software Programmable Gain Amplifier |
| 中文描述： | INSTRUMENTATION AMPLIFIER, 700 uV OFFSET-MAX, 4 MHz BAND WIDTH, CDIP16 |
| 封裝： | HERMETIC SEALED, SIDE BRAZED, CERAMIC, DIP-16 |
| 文件頁數(shù)： | 9/14頁 |
| 文件大?。?/td> | 464K |
| 代理商： | AD526AD |
AD526
REV. D
–9–
The specifications on page 3, in combination with Figure 35,
give the timing requirements for loading new gain codes.
VALID DATA
GAIN CODE
INPUTS
CLK
OR
CS
T
C
T
H
T
S
T
C
= MINIMUM CLOCK CYCLE
T
S
= DATA SETUP TIME
T
H
= DATA HOLD TIME
NOTE: THRESHOLD LEVEL FOR
GAIN CODE,
CS
, AND
CLK
IS 1.4V.
Figure 35. AD526 Timing
TIMING AND CONTROL
Table I. Logic Input Truth Table
Gain Code
A2 A1 A0 B
Control
CLK
(
CS
= 0)
Condition
Gain
Condition
X
0
0
0
0
1
X
X
0
0
0
0
1
X
0
0
1
1
X
X
X
0
0
1
1
X
X
0
1
0
1
X
X
X
0
1
0
1
X
X
1
1
1
1
1
0
0
1
1
1
1
1
1
0
0
0
0
0
0
1
1
1
1
1
1
Previous State
1
2
4
8
16
1
1
1
2
4
8
16
Latched
Transparent
Transparent
Transparent
Transparent
Transparent
Transparent
Latched
Latched
Latched
Latched
Latched
Latched
NOTE: X = Don’t Care.
DIGITAL FEEDTHROUGH
With either
CS
or
CLK
or both held high, the AD526 gain state
will remain constant regardless of the transitions at the A0, A1,
A2 or B inputs. However, high speed logic transitions will un-
avoidably feed through to the analog circuitry within the AD526
causing spikes to occur at the signal output.
This feedthrough effect can be completely eliminated by operat-
ing the AD526 in the transparent mode and latching the gain
code in an external bank of latches (Figure 36).
To operate the AD526 using serial inputs, the configuration
shown in Figure 36 can be used with the 74LS174 replaced by a
serial-in/parallel-out latch, such as the 54LS594.
OUT
FORCE
OUT
SENSE
V
OUT
0.1
m
F
–V
S
0.1
m
F
+V
S
+5V
V
IN
74LS174
1
m
F
B
A2
A0
A1
TIMING
SIGNAL
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
+
–
AD526
16
8
4
2
1
GAIN NETWORK
A1
A0
LOGIC AND LATCHES
CS
CLK
A2
B
Figure 36. Using an External Latch to Minimize Digital
Feedthrough
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相關(guān)代理商/技術(shù)參數(shù) |
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| AD526ADZ | 功能描述:IC AMP PGA 10MA 16CDIP RoHS:是 類別:集成電路 (IC) >> Linear - Amplifiers - Instrumentation 系列:- 標(biāo)準(zhǔn)包裝:2,500 系列:- 放大器類型:通用 電路數(shù):4 輸出類型:- 轉(zhuǎn)換速率:0.6 V/µs 增益帶寬積:1MHz -3db帶寬:- 電流 - 輸入偏壓:45nA 電壓 - 輸入偏移:2000µV 電流 - 電源:1.4mA 電流 - 輸出 / 通道:40mA 電壓 - 電源，單路/雙路(±):3 V ~ 32 V，±1.5 V ~ 16 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:14-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:14-TSSOP 包裝:帶卷 (TR) 其它名稱:LM324ADTBR2G-NDLM324ADTBR2GOSTR |
| AD526B | 制造商:AD 制造商全稱:Analog Devices 功能描述:Software Programmable Gain Amplifier |
| AD526BD | 功能描述:IC AMP PGA 10MA 16CDIP RoHS:否 類別:集成電路 (IC) >> Linear - Amplifiers - Instrumentation 系列:- 標(biāo)準(zhǔn)包裝:2,500 系列:Excalibur™ 放大器類型:J-FET 電路數(shù):1 輸出類型:- 轉(zhuǎn)換速率:45 V/µs 增益帶寬積:10MHz -3db帶寬:- 電流 - 輸入偏壓:20pA 電壓 - 輸入偏移:490µV 電流 - 電源:1.7mA 電流 - 輸出 / 通道:48mA 電壓 - 電源，單路/雙路(±):4.5 V ~ 38 V，±2.25 V ~ 19 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:8-SOIC（0.154"，3.90mm 寬） 供應(yīng)商設(shè)備封裝:8-SOIC 包裝:帶卷 (TR) |
| AD526BDZ | 功能描述:IC AMP PGA 10MA 16CDIP RoHS:是 類別:集成電路 (IC) >> Linear - Amplifiers - Instrumentation 系列:- 標(biāo)準(zhǔn)包裝:2,500 系列:- 放大器類型:通用 電路數(shù):4 輸出類型:- 轉(zhuǎn)換速率:0.6 V/µs 增益帶寬積:1MHz -3db帶寬:- 電流 - 輸入偏壓:45nA 電壓 - 輸入偏移:2000µV 電流 - 電源:1.4mA 電流 - 輸出 / 通道:40mA 電壓 - 電源，單路/雙路(±):3 V ~ 32 V，±1.5 V ~ 16 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:14-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:14-TSSOP 包裝:帶卷 (TR) 其它名稱:LM324ADTBR2G-NDLM324ADTBR2GOSTR |
| AD526C | 制造商:AD 制造商全稱:Analog Devices 功能描述:Software Programmable Gain Amplifier |
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