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參數(shù)資料
| 型號(hào)： | AD524B |
| 廠商： | Analog Devices, Inc. |
| 元件分類(lèi)： | 運(yùn)動(dòng)控制電子 |
| 英文描述： | Single Supply, Rail-to-Rail, Low Cost Instrumentation Amplifier |
| 中文描述： | 單電源，軌至軌，低成本儀表放大器 |
| 文件頁(yè)數(shù)： | 3/16頁(yè) |
| 文件大?。?/td> | 364K |
| 代理商： | AD524B |
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REV. A
–3–
AD5241/AD5242
Parameter
Symbol
Conditions
Min
Typ
1
Max
Unit
INTERFACE TIMING CHARACTERISTICS (Applies to all parts.
5, 9
)
SCL Clock Frequency
t
BUF
Bus Free Time Between
STOP and START
t
HD; STA
Hold Time (Repeated START)
f
SCL
t
1
0
1.3
400
kHz
μ
s
t
2
After this period the first clock
pulse is generated.
600
ns
t
LOW
Low Period of SCL Clock
t
HIGH
High Period of SCL Clock
t
SU; STA
Setup Time for START Condition
t
HD; DAT
Data Hold Time
t
SU; DAT
Data Setup Time
t
R
Rise Time of Both
SDA and SCL Signals
t
F
Fall Time of Both SDA and SCL Signals t
9
t
SU; STO
Setup Time for STOP Condition
NOTES
1
Typicals represent average readings at 25
°
C, V
= 5 V.
2
Resistor position nonlinearity error R-INL is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper posi-
tions. R-DNL measures the relative step change from ideal between successive tap positions. Parts are guaranteed monotonic. See Figure 10 test circuit.
3
INL and DNL are measured at V
with the RDAC configured as a potentiometer divider similar to a voltage output D/A converter. V
A
= V
DD
and V
B
= 0 V.
DNL specification limits of
±
1 LSB maximum are Guaranteed Monotonic operating conditions. See Figure 9 test circuit.
4
Resistor terminals A, B, W have no limitations on polarity with respect to each other.
5
Guaranteed by design and not subject to production test.
6
P
is calculated from (I
×
V
). CMOS logic level inputs result in minimum power dissipation.
7
Bandwidth, noise, and settling time are dependent on the terminal resistance value chosen. The lowest R value results in the fastest settling time and highest band-
width. The highest R value results in the minimum overall power consumption.
8
All dynamic characteristics use V
= 5 V.
9
See timing diagram for location of measured values.
Specifications subject to change without notice.
t
3
t
4
t
5
t
6
t
7
t
8
1.3
0.6
600
μ
s
μ
s
ns
ns
ns
ns
50
900
100
300
300
ns
t
10
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PDF描述 |
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| AD524BD | Single Supply, Rail-to-Rail, Low Cost Instrumentation Amplifier |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD524BD | 功能描述:IC AMP INST 1MHZ PREC LN 16CDIP RoHS:否 類(lèi)別:集成電路 (IC) >> Linear - Amplifiers - Instrumentation 系列:- 標(biāo)準(zhǔn)包裝:50 系列:- 放大器類(lèi)型:J-FET 電路數(shù):2 輸出類(lèi)型:- 轉(zhuǎn)換速率:3.5 V/µs 增益帶寬積:1MHz -3db帶寬:- 電流 - 輸入偏壓:30pA 電壓 - 輸入偏移:2000µV 電流 - 電源:200µA 電流 - 輸出 / 通道:- 電壓 - 電源，單路/雙路(±):7 V ~ 36 V，±3.5 V ~ 18 V 工作溫度:0°C ~ 70°C 安裝類(lèi)型:通孔 封裝/外殼:8-DIP（0.300"，7.62mm） 供應(yīng)商設(shè)備封裝:8-PDIP 包裝:管件 |
| AD524BD/+ | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:Instrumentation Amp， Pin-Programmable |
| AD524BDZ | 功能描述:IC AMP INST 1MHZ PREC LN 16CDIP RoHS:是 類(lèi)別:集成電路 (IC) >> Linear - Amplifiers - Instrumentation 系列:- 標(biāo)準(zhǔn)包裝:2,500 系列:- 放大器類(lèi)型:通用 電路數(shù):4 輸出類(lèi)型:- 轉(zhuǎn)換速率:0.6 V/µs 增益帶寬積:1MHz -3db帶寬:- 電流 - 輸入偏壓:45nA 電壓 - 輸入偏移:2000µV 電流 - 電源:1.4mA 電流 - 輸出 / 通道:40mA 電壓 - 電源，單路/雙路(±):3 V ~ 32 V，±1.5 V ~ 16 V 工作溫度:0°C ~ 70°C 安裝類(lèi)型:表面貼裝 封裝/外殼:14-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:14-TSSOP 包裝:帶卷 (TR) 其它名稱(chēng):LM324ADTBR2G-NDLM324ADTBR2GOSTR |
| AD524BE | 功能描述:IC AMP INST 1MHZ PREC LN 20CLCC RoHS:否 類(lèi)別:集成電路 (IC) >> Linear - Amplifiers - Instrumentation 系列:- 標(biāo)準(zhǔn)包裝:50 系列:- 放大器類(lèi)型:J-FET 電路數(shù):2 輸出類(lèi)型:- 轉(zhuǎn)換速率:3.5 V/µs 增益帶寬積:1MHz -3db帶寬:- 電流 - 輸入偏壓:30pA 電壓 - 輸入偏移:2000µV 電流 - 電源:200µA 電流 - 輸出 / 通道:- 電壓 - 電源，單路/雙路(±):7 V ~ 36 V，±3.5 V ~ 18 V 工作溫度:0°C ~ 70°C 安裝類(lèi)型:通孔 封裝/外殼:8-DIP（0.300"，7.62mm） 供應(yīng)商設(shè)備封裝:8-PDIP 包裝:管件 |
| AD524C | 制造商:AD 制造商全稱(chēng):Analog Devices 功能描述:Precision Instrumentation Amplifier |
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