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參數(shù)資料
| 型號(hào)： | AD5248EVAL |
| 廠商： | Analog Devices, Inc. |
| 元件分類： | 數(shù)字電位計(jì) |
| 英文描述： | Dual 256-Position I2C Compatible Digital Potentiometer |
| 中文描述： | 雙256位I2C兼容數(shù)字電位器 |
| 文件頁數(shù)： | 18/20頁 |
| 文件大?。?/td> | 798K |
| 代理商： | AD5248EVAL |
AD5243/AD5248
Rev. 0 | Page 18 of 20
0
SCL
START BY
MASTER
SDA
0
1
1
FRAME 1
SLAVE ADDRESS BYTE
0
1
1
AD1 AD0
FRAME 2
INSTRUCTION BYTE
ACK BY
AD5248
R/W
A0
SD
X
X
X
X
1
9
D7
D6
D5
D4
D3
ACK BY
AD5248
FRAME 3
DATA BYTE
1
9
X
STOP BY
MASTER
9
D2
D1
D0
ACK BY
AD5248
X
Figure 47. Writing to the RDAC Register—AD5248
0
SCL
START BY
MASTER
STOP BY
MASTER
SDA
0
1
1
FRAME 1
SLAVE ADDRESS BYTE
0
1
1
1
1
FRAME 2
RDAC REGISTER
ACK BY
AD5243
R/W
D7
D6
D4
D3
D2
D1
D0
1
9
NO ACK
BY MASTER
9
D5
Figure 48. Reading Data from a Previously Selected RDAC Register in Write Mode—AD5243
0
SCL
START BY
MASTER
SDA
0
1
1
FRAME 1
SLAVE ADDRESS BYTE
0
1
1
AD1 AD0
FRAME 2
RDAC REGISTER
ACK BY
AD5248
R/W
D7
D6
D4
D3
D2
D1
D0
1
9
9
D5
STOP BY
MASTER
NO ACK
BY MASTER
Figure 49. Reading Data from a Previously Selected RDAC Register in Write Mode—AD5248
Multiple Devices on One Bus (Applies Only to AD5248)
Figure 50 shows four AD5248 devices on the same serial bus.
Each has a different slave address, because the states of their
AD0 and AD1 pins are different. This allows each device on the
bus to be written to or read from independently. The master
device output bus line drivers are open-drain pull-downs in a
fully I
2
C compatible interface.
SDA
SDA
AD1
AD0
MASTER
SCL
SCL
AD5248
SDA
AD1
AD0
SCL
AD5248
SDA
AD1
AD0
SCL
AD5248
SDA
5V
R
P
R
P
5V
5V
5V
AD1
AD0
SCL
AD5248
0
Figure 50. Multiple AD5248 Devices on One I
2
C Bus
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