參數資料
| 型號： | AD5243BRM50 |
| 廠商： | Analog Devices Inc |
| 文件頁數： | 5/20頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DGTL POT DUAL 50K I2C 10-MSOP |
| 標準包裝： | 50 |
| 接片： | 256 |
| 電阻（歐姆）： | 50k |
| 電路數： | 2 |
| 溫度系數： | 標準值 35 ppm/°C |
| 存儲器類型： | 易失 |
| 接口： | I²C |
| 電源電壓： | 2.7 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 10-TFSOP，10-MSOP（0.118"，3.00mm 寬） |
| 供應商設備封裝： | 10-MSOP |
| 包裝： | 管件 |
| 配用： | AD5243EVAL-ND - BOARD EVAL FOR AD5243 |
Data Sheet
AD5243/AD5248
Rev. B | Page 13 of 20
THEORY OF OPERATION
The AD5243/AD5248 are 256-position, digitally controlled
variable resistor (VR) devices.
An internal power-on preset places the wiper at midscale
during power-on, which simplifies the fault condition recovery
at power-up.
PROGRAMMING THE VARIABLE RESISTOR AND
VOLTAGE
Rheostat Operation
The nominal resistance of the RDAC between Terminal A and
Terminal B is available in 2.5 kΩ, 10 kΩ, 50 kΩ, and 100 kΩ.
The nominal resistance (RAB) of the VR has 256 contact points
accessed by the wiper terminal and the B terminal contact. The
8-bit data in the RDAC latch is decoded to select one of the 256
possible settings.
A
W
B
A
W
B
A
W
B
04109-0-012
Figure 37. Rheostat Mode Configuration
Assuming that a 10 kΩ part is used, the first connection of the
wiper starts at the B terminal for Data 0x00. Because there is
a 160 Ω wiper contact resistance, such a connection yields a
minimum of 320 Ω (2 × 160 Ω) resistance between Terminal W
and Terminal B. The second connection is the first tap point,
which corresponds to 359 Ω (RWB = RAB/256 + 2 × RW = 39 Ω +
2 × 160 Ω) for Data 0x01. The third connection is the next tap
point, representing 398 Ω (2 × 39 Ω + 2 × 160 Ω) for Data 0x02,
and so on. Each LSB data value increase moves the wiper up the
resistor ladder until the last tap point is reached at 10,281 Ω
(RAB + 2 × RW).
D5
D4
D3
D7
D6
D2
D1
D0
RDAC
LATCH
AND
DECODER
RS
A
W
B
04109-0-013
Figure 38. AD5243 Equivalent RDAC Circuit
The general equation determining the digitally programmed
output resistance between W and B is
W
AB
WB
R
D
R
2
256
)
(
(1)
where:
D
is the decimal equivalent of the binary code loaded in the
8-bit RDAC register.
RAB
is the end-to-end resistance.
RW
is the wiper resistance contributed by the on resistance of
the internal switch.
In summary, if RAB is 10 kΩ and the A terminal is open circuited,
the following output resistance, RWB, is set for the indicated
RDAC latch codes.
Table 7. Codes and Corresponding RWB Resistance
D (Dec)
RWB (Ω)
Output State
255
10,281
Full scale (RAB 1 LSB + 2 × RW)
128
5380
Midscale
1
359
1 LSB + 2 × RW
0
320
Zero scale (wiper contact resistance)
Note that in the zero-scale condition, a finite wiper resistance of
320 Ω is present. Care should be taken to limit the current flow
between W and B in this state to a maximum pulse current of no
more than 20 mA. Otherwise, degradation or possible destruction
of the internal switch contact may occur.
Similar to the mechanical potentiometer, the resistance of the
RDAC between Wiper W and Terminal A also produces a
digitally controlled complementary resistance, RWA. When these
terminals are used, the B terminal can be opened. Setting the
resistance value for RWA starts at a maximum value of resistance
and decreases as the data loaded in the latch increases in value.
The general equation for this operation is
W
AB
WA
R
D
R
2
256
)
(
(2)
When RAB is 10 kΩ and the B terminal is open circuited, the
output resistance, RWA, is set according to the RDAC latch
codes, as listed in Table 8.
Table 8. Codes and Corresponding RWA Resistance
D (Dec)
RWA (Ω)
Output State
255
359
Full scale
128
5320
Midscale
1
10,280
1 LSB + 2 × RW
0
10,320
Zero scale
Typical device-to-device matching is process-lot dependent and
may vary by up to ±30%. Because the resistance element is pro-
cessed in thin-film technology, the change in RAB with temperature
has a very low temperature coefficient of 35 ppm/°C.
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