參數(shù)資料
型號(hào)： AD5233BRU10
廠商： ANALOG DEVICES INC
元件分類： 數(shù)字電位計(jì)
英文描述： 32-Tap. Nonvolatile. Linear-Taper Digital Potentiometers in SOT23
中文描述： QUAD 10K DIGITAL POTENTIOMETER, 3-WIRE SERIAL CONTROL INTERFACE, 64 POSITIONS, PDSO24
封裝： MO-153AD, TSSOP-24
文件頁數(shù)： 5/14頁
文件大?。?/td> 221K
代理商： AD5233BRU10
PRELIMINARY TECHNICAL DATA
Nonvolatile Memory Digital Potentiometers
AD5231/AD5232/AD5233
AD5231
PIN CONFIGURATION
REV PrF
Information contained in this Preliminary data sheet describes a product in the early definition stage. There is no guarantee that the
information contained here will become a final product in its present form. For latest information contact Walt Heinzer/Analog Devices, Santa
Clara, CA. TEL(408)382-3107; FAX (408)382-2708; walt.heinzer@analog.com
5
22 MAR '01
O1
CLK
SDI
SDO
GND
V
SS
T1
B1
O2
RDY
CS
PR
WP
V
DD
A1
W1
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
AD5231 PIN FUNCTION DESCRIPTION
# Name
Description
1
O1
Non-Volatile Digital Output #1, ADDR(O1) =
1H, data bit position D0
2
CLK
Serial Input Register clock pin. Shifts in one
bit at a time on positive clock CLK edges.
3
SDI
Serial Data Input Pin.
4
SDO
Serial Data Output Pin. Open Drain Output
requires external pull-up resistor. Commands 9
& 10 activate the SDO output. See Instruction
operation Truth Table. Other commands shift
out the previously loaded bit pattern delayed
by 24 clock pulses. This allows daisy-chain
operation of multiple packages.
5
GND
Ground pin, logic ground reference.
6
V
SS
Negative Supply. Connect to zero volts for
single supply applications.
7
T1
Used as digital input during factory test mode.
Leave pin floating or connect to V
DD
or V
SS
.
8
B1
B terminal of RDAC1.
9
W1
Wiper terminal of RDAC1,
ADDR(RDAC1) = 0
H
10
A1
A terminal of RDAC1.
11
V
DD
Positive Power Supply Pin. Should be
≥
the
input-logic HIGH voltage.
12
WP
Write Protect Pin. When active low
WP
prevents any changes to the present contents
except retrieving EEMEM contents and
RESET.
13
PR
Hardware over ride preset pin. Refreshes the
scratch pad register with current contents of
the EEMEM register. Factory default loads
midscale 200
H
until EEMEM loaded with a
new value by the user (
PR
is activated at the
rising logic high transition)
14
CS
Serial Register chip select active low. Serial
register operation takes place when
CS
returns
to logic high.
15
RDY
Ready. Active-high open drain output.
Identifies completion of commands 2, 3, 8, 9,
10.
16
O2
Non-Volatile Digital Output #2, ADDR(O2) =
1H, data bit position D1.
AD5232
PIN CONFIGURATION
CLK
SDI
SDO
GND
V
SS
A1
W1
B1
RDY
CS
PR
WP
V
DD
A2
W2
B2
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
AD5232 PIN FUNCTION DESCRIPTION
# Name
Description
1
CLK
Serial Input Register clock pin. Shifts in one
bit at a time on positive clock edges.
2
SDI
Serial Data Input Pin. Shifts in one bit at a
time on positive clock CLK edges.
3
SDO
Serial Data Output Pin. Open Drain Output
requires external pull-up resistor. Commands 9
& 10 activate the SDO output. See Instruction
operation Truth Table. Other commands shift
out the previously loaded bit pattern delayed
by 16 clock pulses. This allows daisy-chain
operation of multiple packages.
4
GND
Ground pin, logic ground reference
5
V
SS
Negative Supply. Connect to zero volts for
single supply applications.
6
A1
A terminal of RDAC1.
7
W1
Wiper terminal of RDAC1,
ADDR(RDAC1) = 0
H
.
8
B1
B terminal of RDAC1.
9
B2
B terminal of RDAC2.
10
W2
Wiper terminal of RDAC2,
ADDR(RDAC2) = 1
H
.
11
A2
A terminal of RDAC2.
12
V
DD
Positive Power Supply Pin. Should be
≥
the
input-logic HIGH voltage.
13
WP
Write Protect Pin. When active low,
WP
prevents any changes to the present contents,
except retrieving EEMEM content and
RESET.
14
PR
Hardware over ride preset pin. Refreshes the
scratch pad register with current contents of
the EEMEM register. Factory default loads
midscale 80
H
until EEMEM loaded with a new
value by the user (
PR
is activated at the logic
high transition).
15
CS
Serial Register chip select active low. Serial
register operation takes place when
CS
returns
to logic high.
16
RDY
Ready. Active-high open drain output.
Identifies completion of commands 2, 3, 8, 9,
10.
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