參數(shù)資料
型號(hào): AD5232BRU50
廠商: ANALOG DEVICES INC
元件分類: 數(shù)字電位計(jì)
英文描述: 8-Bit Dual Nonvolatile Memory Digital Potentiometer
中文描述: DUAL 50K DIGITAL POTENTIOMETER, 3-WIRE SERIAL CONTROL INTERFACE, 256 POSITIONS, PDSO16
封裝: MO-153AB, TSSOP-16
文件頁數(shù): 13/20頁
文件大?。?/td> 268K
代理商: AD5232BRU50
REV. 0
AD5232
–13–
PROGRAMMING T HE POT E NT IOME T E R DIVIDE R
Voltage Output Operation
T he digital potentiometer easily generates an output voltage
proportional to the input voltage applied to a given terminal.
For example, connecting A-terminal to 5 V and B-terminal to
ground produces an output voltage at the wiper which can be
any value starting at zero volts up to 5 V. Each LSB of voltage is
equal to the voltage applied across terminal AB divided by the
2
N
position resolution of the potentiometer divider. T he general
equation defining the output voltage with respect to ground for
any given input voltage applied to terminals AB is:
V
W
(Dx)
=
Dx
/
2
N
×
V
AB
+
V
B
Operation of the digital potentiometer in the divider mode results in
more accurate operation over temperature. Here the output voltage is
dependent on the ratio of the internal resistors, not the absolute
value; therefore, the drift improves to 15 ppm/
°
C. T here is no
voltage polarity restriction between terminals A, B, and W, as long
as the terminal voltage (V
T ERM
) stays within V
SS
< V
T ERM
< V
DD
.
(3)
OPE RAT ION FROM DUAL SUPPLIE S
T he AD5232 can be operated from dual supplies enabling con-
trol of ground-referenced ac signals. See Figure 11 for a typical
circuit connection.
~
2V p-p
AD5232
V
SS
GND
SDI
CLK
SS
SCLK
MOSI
GND
V
DD
C
1V p-p
V
DD
+2.75V
2.5V
CS
Figure 11. Operation from Dual Supplies
C
A
A
B
C
B
C
W
60pF
RDAC
10k
W
C
A
= 45pF
C
B
= 45pF
Figure 12. RDAC Circuit Simulation Model for RDAC = 10 k
T he internal parasitic capacitances and the external capacitive loads
dominate the ac characteristics of the RDACs. Configured as a
potentiometer divider the –3 dB bandwidth of the AD5232BRU10
(10 k
resistor) measures 500 kHz at half scale. Figure T PC 10
provides the large signal BODE plot characteristics of the three
resistor versions 10 k
, 50 k
, and 100 k
. A parasitic simu-
lation model has been developed, and is shown in Figure 12.
Listing I provides a macro model net list for the 10 k
RDAC:
Listing I. Macro Model Net List for RDAC
.PARAM DW=255, RDAC=10E3
*
.SUBCKT DPOT (A,W,B)
*
CA
A
0
{45E-12}
RAW
A
W
{(1-DW/256)*RDAC+50}
CW
W
0
60E-12
RBW
W
B
{DW/256*RDAC+50}
CB
B
0
{45E-12}
*
.ENDS DPOT
APPLICAT ION PROGRAMMING E X AMPLE S
T he following command sequence examples have been developed
to illustrate a typical sequence of events for the various features
of the AD5232 nonvolatile digital potentiometer.
[PCB = Printed Circuit Board containing the AD523x part].
Instruction numbers (Commands), addresses and data appear-
ing at SDI and SDO pins are listed in hexadecimal.
Table IX . Set Two Digital POTs to Independent Data Values
SDI
B140
H
SDO
X X X X
H
Action
Loads 40
H
data into RDAC2 register,
Wiper W2 moves to 1/4 full-scale
position.
Loads 80
H
data into RDAC1 register,
Wiper W1 moves to 1/2 Full-Scale
position.
B080
H
B140
H
相關(guān)PDF資料
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AD5232 8-Bit Dual Nonvolatile Memory Digital Potentiometer
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