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參數(shù)資料
| 型號： | AD5228BUJZ50-RL7 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 數(shù)字電位計 |
| 英文描述： | 32-Position Manual Up/Down Control Potentiometer |
| 中文描述： | 50K DIGITAL POTENTIOMETER, PUSH-BUTTON CONTROL INTERFACE, 32 POSITIONS, PDSO8 |
| 封裝： | 2.90 X 3 MM, ROHS COMPLIANT, MO-193BA,TSOT-23, 8 PIN |
| 文件頁數(shù)： | 13/20頁 |
| 文件大小： | 341K |
| 代理商： | AD5228BUJZ50-RL7 |
AD5228
Potentiometer Mode Operation
If all three terminals are used, the operation is called
potenti-
ometer mode
. The most common configuration is the voltage
divider operation as shown in Figure 36.
Rev. 0 | Page 13 of 20
0
A
W
B
V
I
V
C
Figure 36. Potentiometer Mode Configuration
The change of V
WB
is known provided that the AD5228
maximum or minimum scale has not been reached during
operation. If the effect of wiper resistance is ignored, the
transfer functions can be simplified as
A
WB
V
V
PU
32
+
=
(5)
A
WB
V
V
PD
32
+
=
(6)
Unlike in rheostat mode operation where the absolute tolerance
is high, potentiometer mode operation yields an almost ratio-
metric function of PU/32 or PD/32 with a relatively small error
contributed by the R
W
term. The tolerance effect is, therefore,
almost canceled. Although the thin film step resistor R
S
and
CMOS switch resistance, R
W
, have very different temperature
coefficients, the ratiometric adjustment also reduces the overall
temperature coefficient effect to 5 ppm/°C except at low value
codes where R
W
dominates.
Potentiometer mode operations include an op amp input and
feedback resistors network and other voltage scaling applications.
The A, W, and B terminals can be input or output terminals and
have no polarity constraint provided that |V
AB
|, |V
WA
|, and |V
WB
|
do not exceed V
DD
-to-GND.
CONTROLLING INPUTS
All PU and PD inputs are protected with a Zener ESD structure
as shown in Figure 37.
0
V
DD
PU
100k
DECODE
AND
DEBOUNCE
CKT
Figure 37. Equivalent ESD Protection in PU and PD Pins
PU and PD pins are usually connected to pushbutton tactile
switches for manual operation, but the AD5228 can also be
controlled digitally. It is recommended to add external
MOSFETs or transistors that simplify the logic controls.
0
UP/DOWN
CONTROL
LOGIC
DISCRETE
STEP/AUTO
SCAN DETECT
ADAPTIVE
DEBOUNCER
ZERO- OR MID-
SCALE PRESET
AD5228
R1
R2
D
E
C
O
D
E
A
W
B
V
DD
PRE
GND
PU
PD
DOWN
N2
2N7002
UP
N1
2N7002
Figure 38. Digital Control with External MOSFETs
TERMINAL VOLTAGE OPERATION RANGE
The AD5228 is designed with internal ESD diodes for
protection. These diodes also set the voltage boundary of the
terminal operating voltages. Positive signals present on
Terminal A, B, or W that exceed V
DD
are clamped by the
forward-biased diode. There is no polarity constraint between
V
A
, V
W
, and V
B
, but they cannot be higher than V
DD
or lower
than GND.
0
V
DD
GND
A
W
B
Figure 39. Maximum Terminal Voltages Set by V
DD
and GND
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| AD522SD | 制造商: 功能描述: 制造商:undefined 功能描述: |
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