參數(shù)資料
型號： AD5220BR100
廠商： ANALOG DEVICES INC
元件分類： 數(shù)字電位計
英文描述： Toggle Switch; Circuitry:DPDT; Switch Operation:On-Off-On; Contact Current Max:6A; Actuator Style:Bat; Switch Terminals:Through Hole; Current Rating:3A; Leaded Process Compatible:Yes; Mounting Type:PCB; Features:Standard Actuator RoHS Compliant: Yes
中文描述： 100K DIGITAL POTENTIOMETER, INCREMENT/DECREMENT CONTROL INTERFACE, 128 POSITIONS, PDSO8
封裝： MS-012AA, SOIC-8
文件頁數(shù)： 2/10頁
文件大?。?/td> 265K
代理商： AD5220BR100
–2–
REV. 0
AD5220–SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
Parameter
Symbol
Conditions
Min
Typ
1
Max
Units
DC CHARACTERISTICS RHEOSTAT MODE Specifications Apply to All VRs
Resistor Differential NL
2
R-DNL
R
WB
, V
A
= NC, R
AB
= 10 k
R
WB
, V
A
= NC, R
AB
= 50 k
or 100 k
R
WB
, V
A
= NC, R
AB
= 10 k
R
WB
, V
A
= NC, R
AB
= 50 k
or 100 k
T
A
= +25
°
C
V
AB
= V
DD
, Wiper = No Connect
I
W
= V
DD
/R, V
DD
= +3 V or +5 V
–1
–0.5
–1
–0.5
–30
±
0.4
±
0.1
±
0.5
±
0.1
+1
+0.5
+1
+0.5
+30
LSB
LSB
LSB
LSB
%
ppm/
°
C
Resistor Nonlinearity
2
R-INL
Nominal Resistor Tolerance
Resistance Temperature Coefficient
Wiper Resistance
R
R
AB
/
T
R
W
800
40
100
DC CHARACTERISTICS POTENTIOMETER DIVIDER MODE Specifications Apply to All VRs
Resolution
N
Integral Nonlinearity
3
INL
7
–1
–0.5
–1
–0.5
Bits
LSB
LSB
LSB
LSB
ppm/
°
C
LSB
LSB
R
AB
= 10 k
R
AB
= 50 k
, 100 k
R
AB
= 10 k
R
AB
= 50 k
, 100 k
Code = 40
H
Code = 7F
H
Code = 00
H
±
0.5
±
0.2
±
0.4
±
0.1
20
–0.5
+0.5
+1
+0.5
+1
+0.5
Differential Nonlinearity Error
3
DNL
Voltage Divider Temperature Coefficient
Full-Scale Error
Zero-Scale Error
V
W
/
T
V
WFSE
V
WZSE
–2
0
0
+1
RESISTOR TERMINALS
Voltage Range
4
Capacitance
5
A, B
Capacitance
5
W
Common-Mode Leakage
V
A,
V
B,
V
W
C
A,
C
B
C
W
I
CM
0
V
DD
V
pF
pF
nA
f = 1 MHz, Measured to GND, Code = 40
H
f = 1 MHz, Measured to GND, Code = 40
H
V
A
= V
B
= V
W
10
48
7.5
DIGITAL INPUTS AND OUTPUTS
Input Logic High
Input Logic Low
Input Current
Input Capacitance
5
V
IH
V
IL
I
IL
C
IL
V
DD
= +5 V/+3 V
V
DD
= +5 V/+3 V
V
IN
= 0 V or +5 V
2.4/2.1
V
V
μ
A
pF
0.8/0.6
±
1
5
POWER SUPPLIES
Power Supply Range
Supply Current
Power Dissipation
6
Power Supply Sensitivity
V
DD
I
DD
P
DISS
PSS
2.7
5.5
40
200
0.015
V
μ
A
μ
W
%/%
V
IH
= +5 V or V
IL
= 0 V, V
DD
= +5 V
V
IH
= +5 V or V
IL
= 0 V, V
DD
= +5 V
15
75
0.004
DYNAMIC CHARACTERISTICS
5, 7, 8
Bandwidth –3 dB
BW_10K
BW_50K
BW_100K
THD
W
t
S
R
AB
= 10 k
, Code = 40
H
R
AB
= 50 k
, Code = 40
H
R
AB
= 100 k
, Code = 40
H
V
A
=1 V rms + 2.5 V dc, V
B
= 2.5 V dc, f = 1 kHz
V
A
= V
DD
, V
B
= 0 V, 50% of Final Value,
10K/50K/100K
R
WB
= 5 k
, f = 1 kHz
650
142
69
0.002
kHz
kHz
kHz
%
Total Harmonic Distortion
V
W
Settling Time
0.6/3/6
14
μ
s
nV/
√
Hz
Resistor Noise Voltage
e
NWB
INTERFACE TIMING CHARACTERISTICS Applies to All Parts
5, 9
Input Clock Pulsewidth
CS
to CLK Setup Time
CS
Rise to Clock Hold Time
U/
D
to Clock Fall Setup Time
t
CH
, t
CL
t
CSS
t
CSH
t
UDS
Clock Level High or Low
25
20
20
10
ns
ns
ns
ns
NOTES
1
Typicals represent average readings at +25
°
C and V
= +5 V.
2
Resistor position nonlinearity error R-INL is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper
positions. R-DNL measures the relative step change from ideal between successive tap positions. Parts are guaranteed monotonic. See Figure 29 test circuit.
3
INL and DNL are measured at V
with the RDAC configured as a potentiometer divider similar to a voltage output D/A converter. V
A
= V
DD
and V
B
= 0 V.
DNL specification limits of
±
1 LSB maximum are guaranteed monotonic operating conditions. See Figure 28 test circuit.
4
Resistor terminals A, B, W have no limitations on polarity with respect to each other.
5
Guaranteed by design and not subject to production test.
6
P
is calculated from (I
×
V
). CMOS logic level inputs result in minimum power dissipation.
7
Bandwidth, noise and settling time are dependent on the terminal resistance value chosen. The lowest R value results in the fastest settling time and highest band-
width. The highest R value results in the minimum overall power consumption.
8
All dynamic characteristics use V
= +5 V.
9
See timing diagrams for location of measured values. All input control voltages are specified with t
R
= t
F
= 1 ns (10% to 90% of V
DD
) and timed from a voltage level
of 1.6 V. Switching characteristics are measured using both V
DD
= +3 V or +5 V.
Specifications subject to change without notice.
(V
DD
= +3 V
6
10% or +5 V
6
10%, V
A
= +V
DD
, V
B
= 0 V, –40
8
C < T
A
< +85
8
C unless
otherwise noted)
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