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參數(shù)資料
| 型號(hào)： | AD5204 |
| 廠商： | Analog Devices, Inc. |
| 元件分類(lèi)： | 通用總線功能 |
| 英文描述： | 32-Tap. Nonvolatile. Linear-Taper Digital Potentiometers in SOT23 |
| 中文描述： | 32抽頭、非易失、線性變化數(shù)字電位器，SOT23封裝 |
| 文件頁(yè)數(shù)： | 3/11頁(yè) |
| 文件大?。?/td> | 173K |
| 代理商： | AD5204 |
–3–
AD5204/AD5206
REV. 0
5
Resistor Terminals A, B, W, have no limitations on polarity with respect to each other.
6
Guaranteed by design and not subject to production test.
7
Measured at the Ax terminals. All Ax terminals are open-circuited in shutdown mode.
8
P
is calculated from (I
×
V
DD
). CMOS logic level inputs result in minimum power dissipation.
9
All dynamic characteristics use V
= +5 V.
10
See timing diagrams for location of measured values. All input control voltages are specified with t
R
= t
F
= 2.5 ns (10% to 90% of 3 V) and timed from a voltage
level of 1.5 V. Switching characteristics are measured using both V
= +3 V or +5 V.
11
Propagation delay depends on value of V
DD
, R
L
and C
L
. See Operation section.
Specifications subject to change without notice.
ABSOLUTE MAXIMUM RATINGS*
(T
A
= +25
°
C, unless otherwise noted)
V
DD
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . .–0.3 V, +7 V
V
SS
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V, –7 V
V
DD
to V
SS
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +7 V
V
A
, V
B
, V
W
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . V
SS
, V
DD
Ax–Bx, Ax–Wx, Bx–Wx . . . . . . . . . . . . . . . . . . . . . .
±
20 mA
Digital Input and Output Voltage to GND . . . . . . . 0 V, +7 V
Operating Temperature Range . . . . . . . . . . . –40
°
C to +85
°
C
Maximum Junction Temperature (T
J
MAX) . . . . . . . .+150
°
C
Storage Temperature . . . . . . . . . . . . . . . . . . –65
°
C to +150
°
C
Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . .+300
°
C
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD5204/AD5206 features proprietary ESD protection circuitry, permanent dam-
age may occur on devices subjected to high energy electrostatic discharges. Therefore, proper
ESD precautions are recommended to avoid performance degradation or loss of functionality.
Package Power Dissipation . . . . . . . . . . . . . . (T
J
max–T
A
)/
θ
JA
Thermal Resistance
θ
JA
P-DIP (N-24) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
°
C/W
SOIC (SOL-24) . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
°
C/W
TSSOP-24 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 143
°
C/W
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
WARNING!
ESD SENSITIVE DEVICE
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