參數(shù)資料
型號(hào)： AD5203AR100
廠(chǎng)商： ANALOG DEVICES INC
元件分類(lèi)： 數(shù)字電位計(jì)
英文描述： 4-Channel, 64-Position Digital Potentiometer
中文描述： 100K DIGITAL POTENTIOMETER, 3-WIRE SERIAL CONTROL INTERFACE, 64 POSITIONS, PDSO24
封裝： SOIC-24
文件頁(yè)數(shù)： 2/12頁(yè)
文件大?。?/td> 259K
代理商： AD5203AR100
–2–
REV. 0
AD5203–SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
Parameter
Symbol
Conditions
Min
Typ
1
Max
Units
DC CHARACTERISTICS RHEOSTAT MODE Specifications Apply to All VRs
Resistor Differential NL
2
Resistor Nonlinearity Error
2
Nominal Resistor Tolerance
3
Resistance Temperature Coefficient
Wiper Resistance
Nominal Resistance Match
R-DNL
R-INL
R
AB
R
AB
/
T
R
W
R/R
O
R
WB
, V
A
= No Connect
R
WB
, V
A
= No Connect
–0.25
–0.5
–30
±
0.1
±
0.1
+0.25
+0.5
+30
LSB
LSB
%
ppm/
°
C
%
V
AB
= V
DD
, Wiper = No Connect
I
W
= 1 V/R
AB
CH 1 to CH 2,
V
AB
= V
DD
, T
A
= +25
°
C
700
45
0.2
100
1
DC CHARACTERISTICS POTENTIOMETER DIVIDER MODE Specifications Apply to All VRs
Resolution
N
Differential Nonlinearity Error
4
DNL
Integral Nonlinearity Error
INL
Voltage Divider Temperature Coefficient
V
W
/
T
Full-Scale Error
V
WFSE
Zero-Scale Error
V
WZSE
6
–0.25
–0.75
Bits
LSB
LSB
ppm/
°
C
LSB
LSB
±
0.1
±
0.1
20
–0.2
+0.1
+0.25
+0.75
Code = 20
H
Code = 3F
H
Code = 00
H
–0.75
0
0
+0.75
RESISTOR TERMINALS
Voltage Range
5
Capacitance
6
Ax, Bx
Capacitance
6
Wx
Shutdown Supply Current
7
Shutdown Wiper Resistance
V
A,
V
B,
V
W
C
A,
C
B
C
W
I
A_SD
R
W_SD
0
V
DD
V
pF
pF
μ
A
f = 1 MHz, Measured to GND, Code = 20
H
f = 1 MHz, Measured to GND, Code = 20
H
V
A
= V
DD
, V
B
= 0 V,
SHDN
= 0
V
A
= V
DD
, V
B
= 0 V,
SHDN
= 0, V
DD
= +5 V
75
120
0.01
45
5
100
DIGITAL INPUTS AND OUTPUTS
Input Logic High
Input Logic Low
Input Logic High
Input Logic Low
Output Logic High
Output Logic Low
Input Current
Input Capacitance
6
V
IH
V
IL
V
IH
V
IL
V
OH
V
OL
I
IL
C
IL
V
DD
= +5 V
V
DD
= +5 V
V
DD
= +3 V
V
DD
= +3 V
R
L
= 2.2 k
to V
DD
I
OL
= 1.6 mA, V
DD
= +5 V
V
IN
= 0 V or +5 V, V
DD
= +5 V
2.4
V
V
V
V
V
V
μ
A
pF
0.8
2.1
0.6
V
DD
–0.1
0.4
±
1
5
POWER SUPPLIES
Power Supply Range
Supply Current (CMOS)
Supply Current (TTL)
Power Dissipation (CMOS)
9
Power Supply Sensitivity
V
DD
Range
I
DD
I
DD
P
DISS
PSS
PSS
2.7
5.5
5
4
27.5
0.001
0.03
V
μ
A
mA
μ
W
%/%
%/%
V
IH
= V
DD
or V
IL
= 0 V
V
IH
= 2.4 V or V
IL
= 0.8 V, V
DD
= +5.5 V
V
IH
= V
DD
or V
IL
= 0 V, V
DD
= +5.5 V
V
DD
= +5 V
±
10%
V
DD
= +3 V
±
10%
0.01
0.9
0.0002
0.006
DYNAMIC CHARACTERISTICS
6, 10
Bandwidth –3 dB
BW_10K
BW_100K
THD
W
t
S
_10K
t
S
_100K
e
NWB
R
AB
= 10 k
R
AB
= 100 k
V
A
=1 V rms + 2 V dc, V
= 2 V dc, f = 1 kHz
V
A
= V
DD
, V
B
= 0 V,
±
1 LSB Error Band
V
A
= V
DD
, V
B
= 0 V,
±
1 LSB Error Band
R
WB
= 5 k
, f = 1 kHz,
RS
= 0
R
WB
= 50 k
, f = 1 kHz,
RS
= 0
V
A
= V
DD
, V
B
= 0 V
600
71
0.003
2
18
9
29
–65
kHz
kHz
%
μ
s
μ
s
nV/
√
Hz
nV/
√
Hz
dB
Total Harmonic Distortion
V
W
Settling Time
Resistor Noise Voltage
Crosstalk
11
C
T
INTERFACE TIMING CHARACTERISTICS Applies to All Parts
6, 12
Input Clock Pulsewidth
Data Setup Time
Data Hold Time
CLK to SDO Propagation Delay
13
CS
Setup Time
CS
High Pulsewidth
Reset Pulsewidth
CLK Fall to
CS
Rise Hold Time
CS
Rise to Clock Rise Setup
t
CH
, t
CL
t
DS
t
DH
t
PD
t
CSS
t
CSW
t
RS
t
CSH
t
CS1
Clock Level High or Low
10
5
5
1
10
10
50
0
10
ns
ns
ns
ns
ns
ns
ns
ns
ns
R
L
= 2.2 k
, C
L
< 20 pF
25
(V
DD
= +3 V
6
10% or +5 V
6
10%, V
A
= +V
DD
, V
B
= 0 V, –40
8
C < T
A
< +85
8
C unless
otherwise noted)
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