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參數(shù)資料
| 型號： | AD5171BRJ100-R2 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 數(shù)字電位計 |
| 英文描述： | 64-Position OTP Digital Potentiometer |
| 中文描述： | 100K DIGITAL POTENTIOMETER, 2-WIRE SERIAL CONTROL INTERFACE, 64 POSITIONS, PDSO8 |
| 封裝： | MO-178-BA, SOT-23, 8 PIN |
| 文件頁數(shù)： | 13/20頁 |
| 文件大?。?/td> | 1722K |
| 代理商： | AD5171BRJ100-R2 |
AD5171
TERMINAL VOLTAGE OPERATING RANGE
There are also ESD protection diodes between V
DD
and the
RDAC terminals. The V
DD
of AD5171 therefore defines their
voltage boundary conditions, see Figure 29. Supply signals
present on terminals A, B, and W that exceed V
DD
will be
clamped by the internal forward-biased diodes and should be
avoided.
GND
A
W
B
V
DD
0
Figure 29. Maximum Terminal Voltages Set by V
DD
POWER-UP/POWER-DOWN SEQUENCES
Similarly, because of the ESD protection diodes, it is important
to power V
DD
first before applying any voltages to terminals A,
B, and W. Otherwise, the diode will be forward-biased such that
V
DD
will be powered unintentionally and may affect the rest of
the users’ circuits. The ideal power-up sequence is in the
following order: GND, V
DD
, digital inputs, and V
A
/V
B
/V
W
. The
order of powering V
A
, V
B
, V
W
, and digital inputs is not
important as long as they are powered after V
DD
. Similarly, V
DD
should be powered down last.
POWER SUPPLY CONSIDERATIONS
To minimize the package pin count, both the one-time
programming and normal operating voltages are applied to the
same V
DD
terminal of the AD5171. The AD5171 employs fuse
link technology that requires 6 V to blow the internal fuses to
achieve a given setting. On the other hand, it operates at 2.7 V to
5.5 V once the programming is complete. Such dual voltage
requires isolation between supplies. The fuse programming
supply (either an on-board regulator or rack-mount power
supply) must be rated at 6 V and be able to handle 400 ms and
100 mA of transient current for one-time programming. Once
programming is complete, the 6 V supply must be removed to
allow normal operation of 2.7 V to 5.5 V. Figure 30 shows the
simplest implementation using a jumper. This approach saves
one voltage supply, but draws additional current and requires
manual configuration.
AD5171
V
DD
C2
0.1
μ
F
5V
CONNECT J1
HERE FOR OTP
C1
1
μ
F
J1
R1
50k
R2
250k
6V
CONNECT J1
HERE AFTER OTP
0
Figure 30. Power Supply Requirement
An alternate approach in 3.5 V to 5.5 V systems adds a signal
diode between the system supply and the OPT supply for
isolation, as shown in Figure 31.
AD5171
V
DD
C2
0.1
μ
F
APPLY FOR OTP ONLY
C1
10
μ
F
D1
3.5V–5.5V
6V
0
Figure 31. Isolating the 6 V OPT Supply from the 3.5V to 5.5 V Normal
Operating Supply. The 6 V supply must be removed once OPT is complete.
AD5171
V
DD
C2
0.1
μ
F
APPLY FOR OTP ONLY
C1
10
μ
F
10k
2.7V
6V
P1
P2
R1
P1 = P2 = FDV302P, NDS0610
0
Figure 32. Isolating the 6 V OPT Supply from the 2.7 V Normal Operating
Supply. The 6 V supply must be removed once OPT is complete.
For users who operate their systems at 2.7 V, it is recommended
to use the bi-directional low-threshold P-Ch MOSFETs for the
supplies isolation. As shown in Figure 32 assumes the 2.7 V
system voltage is applied first but not the 6 V. The gates of P1
are P2 are pulled to ground, which turns on P1 and subse-
quently P2. As a result, V
DD
of AD5171 becomes 2.7 V minus a
few tenths of mV drop across P1 and P2. When the AD5171
setting is found, the factory tester applies the 6 V to V
DD
and
also to the gates of P1 and P2 to turn them off. While the OTP
command is executing at this time to program AD5171, the
2.7 V source is therefore protected. Once the OTP is complete,
the tester withdraws the 6 V, and AD5171 setting is permanently
fixed.
Rev. PrC | Page 13 of 20
Preliminary Technical Data
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