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參數(shù)資料
| 型號(hào)： | AD5162BRM2.5-RL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 7/20頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DGTL POT DUAL 256POS 10-MSOP |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 接片： | 256 |
| 電阻（歐姆）： | 2.5k |
| 電路數(shù)： | 2 |
| 溫度系數(shù)： | 標(biāo)準(zhǔn)值 35 ppm/°C |
| 存儲(chǔ)器類型： | 易失 |
| 接口： | 3 線串行（芯片選擇） |
| 電源電壓： | 2.7 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 10-TFSOP，10-MSOP（0.118"，3.00mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 10-MSOP |
| 包裝： | 帶卷 (TR) |
| 配用： | AD5162EVAL-ND - BOARD EVAL FOR AD5162 |
AD5162
Rev. C | Page 15 of 20
LAYOUT AND POWER SUPPLY BYPASSING
It is good practice to employ compact, minimum lead length
layout design. The leads to the inputs should be as direct as
possible with a minimum conductor length. Ground paths
should have low resistance and low inductance.
Similarly, it is also good practice to bypass the power supplies with
quality capacitors for optimum stability. Supply leads to the device
should be bypassed with disc or chip ceramic capacitors of 0.01 μF
to 0.1 μF. Low ESR 1 μF to 10 μF tantalum or electrolytic capacitors
should also be applied at the supplies to minimize any transient
disturbance and low frequency ripple (see Figure 39). In addition,
note that the digital ground should be joined remotely to the
analog ground at one point to minimize the ground bounce.
VDD
GND
VDD
C3
10
F
C1
0.1
F
AD5162
+
04108-0-040
Figure 39. Power Supply Bypassing
CONSTANT BIAS TO RETAIN RESISTANCE SETTING
For users who desire nonvolatility but cannot justify the additional
cost of the EEMEM, the AD5162 can be considered a low cost
alternative by maintaining a constant bias to retain the wiper
setting. The AD5162 is designed specifically for low power
applications, allowing low power consumption even in battery-
operated systems. The graph in Figure 40 demonstrates the
power consumption from a 3.4 V, 450 mAhr Li-Ion cell phone
battery connected to the AD5162. The measurement over time
shows that the device draws approximately 1.3 μA and consumes
negligible power. Over a course of 30 days, the battery is depleted
by less than 2%, the majority of which is due to the intrinsic
leakage current of the battery itself.
This demonstrates that constantly biasing the potentiometer can be
a practical approach. Most portable devices do not require the
removal of batteries for the purpose of charging. Although the
resistance setting of the AD5162 is lost when the battery needs
replacement, such events occur rather infrequently such that
this inconvenience is justified by the lower cost and smaller size
offered by the AD5162. If total power is lost, the user should be
provided with a means to adjust the setting accordingly.
DAYS
B
A
T
ER
Y
L
IF
E
D
E
PL
ET
ED
(
%
)
0
90
92
94
96
510
15
98
100
102
104
106
108
110
20
25
30
04
10
8-
0-
0
41
TA = 25°C
Figure 40. Battery Operating Life Depletion
EVALUATION BOARD
An evaluation board, along with all necessary software, is
available to program the AD5162 from any PC running
Windows 98/2000/XP. The graphical user interface, as shown
in Figure 41, is straightforward and easy to use. More detailed
information is available in the user manual, which is supplied
with the board.
04
10
8-
0-
0
44
Figure 41. AD5162 Evaluation Board Software
The AD5162 starts at midscale upon power-up. To increment or
decrement the resistance, simply move the scrollbars in the left of
the software window (see Figure 41). To write a specific value,
use the bit pattern in the upper part of the SDI Write Bit Control
(Hit Run)
box and then click Run. The format of writing data
to the device is shown in Table 8.
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| AD5162BRMZ10 | 功能描述:IC POT DUAL 10K 256POS 10-MSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)字電位器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- 接片:256 電阻（歐姆）:100k 電路數(shù):1 溫度系數(shù):標(biāo)準(zhǔn)值 35 ppm/°C 存儲(chǔ)器類型:非易失 接口:3 線串口 電源電壓:2.7 V ~ 5.25 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:8-WDFN 裸露焊盤 供應(yīng)商設(shè)備封裝:8-TDFN-EP（3x3） 包裝:剪切帶 (CT) 產(chǎn)品目錄頁面:1399 (CN2011-ZH PDF) 其它名稱:MAX5423ETA+TCT |
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