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| 型號： | AD5162BRM10 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 5/20頁 |
| 文件大小： | 0K |
| 描述： | IC POT DUAL 10K 256POS 10-MSOP |
| 標(biāo)準(zhǔn)包裝： | 50 |
| 接片： | 256 |
| 電阻（歐姆）： | 10k |
| 電路數(shù)： | 2 |
| 溫度系數(shù)： | 標(biāo)準(zhǔn)值 35 ppm/°C |
| 存儲器類型： | 易失 |
| 接口： | 3 線串行（芯片選擇） |
| 電源電壓： | 2.7 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 10-TFSOP，10-MSOP（0.118"，3.00mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 10-MSOP |
| 包裝： | 管件 |
| 配用： | AD5162EVAL-ND - BOARD EVAL FOR AD5162 |
AD5162
Rev. C | Page 13 of 20
THEORY OF OPERATION
The AD5162 is a 256-position, digitally controlled variable
resistor (VR) device.
An internal power-on preset places the wiper at midscale
during power-on, which simplifies the fault condition recovery
at power-up.
PROGRAMMING THE VARIABLE RESISTOR AND
VOLTAGE
Rheostat Operation
The nominal resistance of the RDAC between Terminal A and
Terminal B is available in 2.5 k, 10 k, 50 k, and 100 k.
The nominal resistance (RAB) of the VR has 256 contact points
accessed by the wiper terminal and the B terminal contact. The
8-bit data in the RDAC latch is decoded to select one of the
256 possible settings.
A
W
B
A
W
B
A
W
B
04108-0-034
Figure 33. Rheostat Mode Configuration
Assuming that a 10 k part is used, the first connection of the
wiper starts at the B terminal for Data 0x00. Because there is
a 50 wiper contact resistance, such a connection yields a
minimum of 100 (2 × 50 ) resistance between Terminal W
and Terminal B. The second connection is the first tap point,
which corresponds to 139 (RWB = RAB/256 + 2 × RW = 39 +
2 × 50 ) for Data 0x01. The third connection is the next tap
point, representing 178 (2 × 39 + 2 × 50 ) for Data 0x02,
and so on. Each LSB data value increase moves the wiper up the
resistor ladder until the last tap point is reached at 10,100
(RAB + 2 × RW).
D5
D4
D3
D7
D6
D2
D1
D0
RDAC
LATCH
AND
DECODER
RS
A
W
B
04108-0-035
Figure 34. AD5162 Equivalent RDAC Circuit
The general equation determining the digitally programmed
output resistance between W and B is
W
AB
WB
R
D
R
×
+
×
=
2
256
)
(
(1)
where:
D is the decimal equivalent of the binary code loaded in the
8-bit RDAC register.
RAB is the end-to-end resistance.
RW is the wiper resistance contributed by the on resistance of
the internal switch.
In summary, if RAB is 10 k and the A terminal is open
circuited, the output resistance, RWB, is set according to the
RDAC latch codes, as listed in Table 6.
Table 6. Codes and Corresponding RWB Resistance
D (Dec)
R
WB ()
Output State
255
9961
Full scale (R
AB 1 LSB + RW)
128
5060
Midscale
1
139
1 LSB
0
100
Zero scale (wiper contact resistance)
Note that in the zero-scale condition, a finite wiper resistance of
100 is present. Care should be taken to limit the current flow
between W and B in this state to a maximum pulse current of
no more than 20 mA. Otherwise, degradation or possible
destruction of the internal switch contact may occur.
Similar to the mechanical potentiometer, the resistance of the
RDAC between Wiper W and Terminal A also produces a
digitally controlled complementary resistance, RWA. When these
terminals are used, the B terminal can be opened. Setting the
resistance value for RWA starts at a maximum value of resistance
and decreases as the data loaded in the latch increases in value.
The general equation for this operation is
W
AB
WA
R
D
R
×
+
×
=
2
256
)
(
(2)
When RAB is 10 k and the B terminal is open circuited, the
output resistance, RWA, is set according to the RDAC latch
codes, as listed in Table 7.
Table 7. Codes and Corresponding RWA Resistance
D (Dec)
R
WA ()
Output State
255
139
Full scale
128
5060
Midscale
1
9961
1 LSB
0
10,060
Zero scale
Typical device-to-device matching is process-lot dependent and
may vary by up to ±30%. Because the resistance element is
processed in thin-film technology, the change in RAB with tem-
perature has a very low temperature coefficient of 35 ppm/°C.
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