參數(shù)資料
型號(hào): AD5062BRJ-1
廠商: ANALOG DEVICES INC
元件分類: DAC
英文描述: Full Accurate 16 Bit Vout nanoDac, 2.7V- 5.5V, in a Sot 23
中文描述: SERIAL INPUT LOADING, 3 us SETTLING TIME, 16-BIT DAC, PDSO8
封裝: SOT-23, 8 PIN
文件頁數(shù): 6/17頁
文件大?。?/td> 833K
代理商: AD5062BRJ-1
AD5062/AD5063
Preliminary Technical Data
PIN CONFIGURATION AND FUNCTION
DESCRIPTION
Rev. Pr B | Page 6 of 17
Figure 2. AD5062 8ld Sot23
Figure 3. AD5063 10 ld uSOIC.
Table 2. Pin Function Descriptions
Mnemonic
Function
V
DD
Power Supply Input. These parts can be operated from +2.5 V to +5.5 V and V
DD
should be decoupled to GND.
REF
Reference Voltage Input.
DacGND
Ground input to the DAC.
V
OUT
Analog output voltage from DAC.
Level triggered control input (active low). This is the frame synchronization signal for the input data. When
SYNC
goes low,
it enables the input shift register and data is transferred in on the falling edges of the following clocks. The DAC is updated
following the 16th clock cycle unless
SYNC
is taken high before this edge in which case the rising edge of
SYNC
acts as an
interrupt and the write sequence is ignored by the DAC.
Serial Clock Input. Data is clocked into the input shift register on the falling edge of the serial clock input. Data can be
transferred at rates up to 30 MHz.
Serial Data Input. This device has a 24 bit shift register. Data is clocked into the register on the falling edge of the serial clock
input.
AGND
Ground reference point for Analog circuitry on the part.
RFB
Feedback Resistor. In bipolar mode connect this pin to external op amp circuit.
INV
Connected to the internal Scaling resistors of the DAC. Connect INV pin to external op-amps inverting input in bipolar mode.
SYNC
SCLK
D
IN
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