參數(shù)資料
型號(hào)： AD5045BRUZ-REEL7
廠商： ANALOG DEVICES INC
元件分類： DAC
英文描述： Fully Accurate 12-/14-/16-Bit VOUT DAC SPI Interface 2.7 V to 5.5 V in a TSSOP
中文描述： SERIAL INPUT LOADING, 10.7 us SETTLING TIME, 14-BIT DAC, PDSO14
封裝： ROHS COMPLIANT, MO-153AB-1, TSSOP-14
文件頁(yè)數(shù)： 1/33頁(yè)
文件大?。?/td> 435K
代理商： AD5045BRUZ-REEL7
Fully Accurate 12-/14-/16-Bit V
OUT
DAC SPI Interface
2.7 V to 5.5 V in a TSSOP
AD5025/45/65
Preliminary Technical Data
FEATURES
Low power Dual 12-/14-/16 bit DAC, ± 1LSB INL
Individual Voltage reference pins
Rail-to-rail operation
2.7 V to 5.5 V power supply
Power-on reset to zero scale or midscale
Power down to 400 nA @ 5 V, 200 nA @ 3 V
3 power-down functions
Per channel power-down
Low glitch upon power up
Hardware Power Down lock Out Capability
Hardware LDAC with LDAC override function
CLR Function to programmable code
SDO daisy-chaining option
14 lead TSSOP
APPLICATIONS
Process control
Data acquisition systems
Portable battery-powered instruments
Digital gain and offset adjustment
Programmable voltage and current sources
Programmable attenuators
GENERAL DESCRIPTION
Rev. PrB
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
2007 Analog Devices, Inc. All rights reserved.
www.analog.com
Functional Block Diagrams
INLOGIC
SCLK
SYNC
DIN
CLR
RINPUT
RINPUT
REDAC
REDAC
V
DD
GND
PRESET
DAC A
DAC B
BUFFER
BUFFER
V
REFA
POLOGIC
V
OUT
A
V
OUT
B
AD5025/AD5045R/AD5065
LDAC
LDAC
0
POR
SDO
V
REFB
PDL
Figure 1.AD5025/45/65
Table 1. Related Devices
Part No.
AD5666
AD5066
AD5064/44/24
AD5063/62
AD5061
AD5060/40
Description
Quad,16-bit buffered D/A,16 LSB INL, TSSOP
Quad,16-bit unbuffered D/A,1 LSB INL, TSSOP
Quad 16-bit
nano
DAC, 1 LSB INL, TSSOP
16-bit
nano
DAC, 1 LSB INL, MSOP
16-/14bit
nano
DAC, 4 LSB INL, SOT-23
16-/14bit
nano
DAC, 1 LSB INL, SOT-23
The AD5025/45/65 are low power, dual 12-/14-/16-bit buffered
voltage-out DACs offering relative accuracy specs of 1 LSB INL
with individual reference pins and can operate from a single 2.7
V to 5.5 V supply. The AD5025/45/65 64 parts also offer a
differential accuracy specification of ±1 LSB. The parts use a
versatile 3-wire, low power Schmitt trigger serial interface that
operates at clock rates up to 50 MHz and is compatible with
standard SPI, QSPI, MICROWIRE, and DSP interface
standards. The reference for the AD5025/45 and AD5065 are
supplied from an external pin. A reference buffer is also
provided on-chip. The AD5025/45/64 incorporates a power-on
reset circuit that ensures the DAC output powers up zero scale
or midscale and remains there until a valid write takes place to
the device. The AD5025/45/65 contain a power-down feature
that reduces the current consumption of the device to typically
330 nA at 5 V and provides software selectable output loads
while in power-down mode. The parts are put into power-down
mode over the serial interface. Total unadjusted error for the
parts is <2 mV.
Both parts exhibit very low glitch on power-up. The outputs of
all DACs can be updated simultaneously using the LDAC
function, with the added functionality of user-selectable DAC
channels to simultaneously update. There is also an
asynchronous CLR that clears all DACs to a software-selectable
code—0 V, midscale, or full scale. The Part also features a power
down lockout pin PDL, which can be used to prevent the DAC
from entering power down under any circumstances over the
serial interface.
PRODUCT HIGHLIGHTS
1.
Dual channel available in 14-lead TSSOP package with
individual Voltage reference pins.
2.
12-/14-/-16 bit accurate, 1 LSB INL.
3.
Low glitch on power-up.
4.
High speed serial interface with clock speeds up to 50 MHz.
5.
Three power-down modes available to the user.
6.
Reset to known output voltage (zero scale or midscale).
7.
Power Down lockout capability.
相關(guān)PDF資料
PDF描述
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD504KH 制造商:Rochester Electronics LLC 功能描述:- Bulk
AD504LH 制造商:Rochester Electronics LLC 功能描述:- Bulk
AD504MH 制造商:Rochester Electronics LLC 功能描述:- Bulk
AD504SH 制造商:Rochester Electronics LLC 功能描述:- Bulk
AD505-00E 功能描述:SENSOR MAG SW 40G STANDRD 8-MSOP 制造商:nve corp/sensor products 系列:AD 包裝:管件 零件狀態(tài):有效 功能:全極開(kāi)關(guān) 技術(shù):霍爾效應(yīng) 極化:任意一種 感應(yīng)范圍:±5mT 跳閘，±2.5mT 釋放 測(cè)試條件:-40°C ~ 125°C 電壓 - 電源:4.5 V ~ 30 V 電流 - 電源（最大值）:4.5mA 電流 - 輸出（最大值）:20mA 輸出類型:開(kāi)路集電極 特性:- 工作溫度:-40°C ~ 125°C（TA） 封裝/外殼:8-TSSOP，8-MSOP（0.118"，3.00mm 寬） 供應(yīng)商器件封裝:8-MSOP 標(biāo)準(zhǔn)包裝:1,000
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