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參數(shù)資料
| 型號(hào)： | AD2S83APZ |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 18/19頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC R/D CONV TRACKING 44PLCC |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 類型： | R/D 轉(zhuǎn)換器 |
| 輸入類型： | 并聯(lián) |
| 輸出類型： | 數(shù)字 |
| 接口： | 并聯(lián) |
| 電流 - 電源： | 30mA |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 44-LCC（J 形引線） |
| 供應(yīng)商設(shè)備封裝： | 44-PLCC（16.59x16.59） |
| 包裝： | 管件 |
| 產(chǎn)品目錄頁(yè)面： | 790 (CN2011-ZH PDF) |
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AD2S83
REV. E
–8–
COMPONENT SELECTION
The following instructions describe how to select the external
components for the converter in order to achieve the required
bandwidth and tracking rate. In all cases the nearest “preferred
value” component should be used, and a 5% tolerance will not
degrade the overall performance of the converter. Care should
be taken that the resistors and capacitors will function over the
required operating temperature range. The components should
be connected as shown in Figure 1.
Free PC compatible software is available to help users select the
optimum component values for the AD2S83, and display the transfer
gain, phase and small step response.
For more detailed information and explanation, see the Circuit
Functions and Dynamic Performance section.
1. HF Filter (R1, R2, C1, C2)
The function of the HF filter is to remove any dc offset and
to reduce the amount of noise present on the signal inputs to
the AD2S83, reaching the Phase Sensitive Detector and
affecting the outputs. R1 and C2 may be omitted—in which
case R2 = R3 and C1 = C3, calculated below—but their use
is particularly recommended if noise from switch mode
power supplies and brushless motor drive is present.
Values should be chosen so that
15 k
≤ R1= R2 ≤ 56 k
C1
= C2 =
1
2
π R1 f
REF
and fREF = Reference Frequency
(Hz)
This filter gives an attenuation of three times at the input to
the phase sensitive detector.
2. Gain Scaling Resistor (R4) (See Phase Sensitive Demodula-
tor section.)
If R1, C2 are used:
R4
=
E
DC
100
× 10
9 ×
1
3
where 100
× 10–9 = current/LSB
If R1, C2 are not used:
R4
=
E
DC
100
× 10
–9
where EDC
= 160
× 10–3 for 10 bits resolution
= 40
× 10–3 for 12 bits
= 10
× 10–3 for 14 bits
= 2.5
× 10–3 for 16 bits
= Scaling of the DC ERROR in volts/LSB
3. AC Coupling of Reference Input (R3, C3)
Select R3 and C3 so that there is no significant phase shift at
the reference frequency. That is,
R 3
= 100 k
C 3
>
1
R 3
× f
REF
F
with R3 in
.
4. Maximum Tracking Rate (R6)
The VCO input resistor R6 sets the maximum tracking rate
of the converter and hence the velocity scaling as at the max
tracking rate, the velocity output will be 8 V.
Decide on your maximum tracking rate, “T,” in revolutions
per second. When setting the value for R6, it should be
remembered that the linearity of the velocity output is
specified across 0 kHz–500 kHz and 500 kHz–1000 kHz.
The following conversion can be used to determine the
corresponding rps:
rps
=
VCO Rate (Hz )
2
N
Note that “T” must not exceed the maximum tracking rate
or 1/16 of the reference frequency.
R6
=
6.81
× 10
10
T
× n
where n = bits per revolution
= 1,024 for 10 bits resolution
= 4,096 for 12 bits
= 16,384 for 14 bits
= 65,536 for 16 bits
5. Closed-Loop Bandwidth Selection (C4, C5, R5)
a. Choose the closed-loop bandwidth (fBW) required
ensuring that the ratio of reference frequency to band-
width does not exceed the following guidelines:
Resolution
Ratio of Reference Frequency/Bandwidth
10
2.5 : 1
12
4
: 1
14
6
: 1
16
7.5 : 1
Typical values may be 100 Hz for a 400 Hz reference fre-
quency and 500 Hz to 1000 Hz for a 5 kHz reference
frequency.
b.
Select C4 so that
C4
=
21
R6
× f
BW
2
F
with R6 in
and fBW, in Hz selected above.
c.
C5 is given by
C5
= 5 × C4
d.
R5 is given by
R5
=
4
2
×π × f
BW × C 5
6. VCO Phase Compensation
The following values of C6 and R7 should be connected as
close as possible to the VCO output, Pin 41.
C6
= 390 pF, R7 = 3.3 k
7. VCO Optimization
To optimize the performance of the VCO a capacitor, C7,
should be placed across the VCO input and output, Pins 40
and 41.
C7
= 150 pF
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