參數(shù)資料
型號(hào)： AD1981BLJST
廠商： ANALOG DEVICES INC
元件分類： 消費(fèi)家電
英文描述： AC 97 SoundMAX Codec
中文描述： SPECIALTY CONSUMER CIRCUIT, PQFP48
封裝： MS-026BBC, LQFP-48
文件頁(yè)數(shù)： 29/32頁(yè)
文件大?。?/td> 326K
代理商： AD1981BLJST
AD1981BL
SERIAL CONFIGURATION REGISTER
Index 0x74
Rev. A | Page 29 of 32
Reg No.
0x74
Name
Serial
Config
D15
SLOT16
D14
REGM2
D13
REGM1
D12
REGM0
D11
X
D10
X
D9
X
D8
CHEN
D7
X
D6
X
D5
X
D4
INTS
D3
X
D2
SPAL
D1
SPDZ
D0
SPLNK
Default
0x7001
This register is not reset when the reset register (Register 0x00) is written.
All registers are not shown, and bits containing an X are assumed to be reserved.
Table 42.
Bit
Mnemonic
SPLNK
SPDIF Link
Function
This bit enables the SPDIF to link with the DAC for data requests.
0 = SPDIF and DAC are not linked.
1 = SPDIF and DAC are linked and receive the same data requests (reset default).
0 = Repeat last sample out of the SPDIF stream if FIFO underruns (reset default).
1 = Forces midscale sample out the SPDIF stream if FIFO underruns.
0 = SPDIF transmitter is connected to the ac-link stream (reset default).
1 = SPDIF transmitter is connected to the digital ADC stream, not the ac-link.
This bit selects the JS interrupt implementation path.
0 = Bit 0 Slot 12 (modem interrupt).
1 = Slot 6 valid bit (MIC ADC interrupt).
This bit enables chaining of a slave codec SDATA_IN stream into the ID0 pin (Pin 45).
0 = Disable chaining (reset default).
1 = Enable chaining into ID0 pin.
SPDZ
SPDIF DACZ
SPAL
SPDIF ADC Loop-
Around
Interrupt Mode Select
INTS
CHEN
Chain Enable
REGM0
Master Codec Register
Mask
Slave 1 Codec Register
Mask
Slave 2 Codec Register
Mask
Enable 16-Bit Slot Mode
REGM1
REGM2
SLOT16
Slot 16 makes all ac-link slots 16 bits in length, formatted into 16 slots. This is a preferred mode for
DSP serial port interfacing.
MISCELLANEOUS CONTROL BIT REGISTER
Index 0x76
Reg
No.
0x76
Name
Misc
Control
Bit
D15
DACZ
D14
X
D13
MSPLT
D12
LODIS
D11
DAM
D10
X
D9
FMXE
D8
X
D7
MADPD
D6
2CMIC
D5
X
D4
MADST
D3
VREFH
D2
VREFD
D1
MBG1
D0
MBG0
Default
0x0000
All registers are not shown, and bits containing an X are assumed to be reserved.
Table 43.
Bit
Mnemonic
MBG [1:0]
MIC Boost Gain Change
Register
Function
These two bits allow changing the MIC preamp gain from the nominal 20 dB gain.
This gain setting takes effect only while Bit D6 (M20) on the MIC volume register (0x0E) is set to 1;
otherwise, the MIC boost block has a gain of 0 dB.
00 = 20 dB gain (reset default).
01 = 10 dB gain.
10 = 30 dB gain.
11 = Reserved.
相關(guān)PDF資料
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AD1981BLJST-REEL AC 97 SoundMAX Codec
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD1981BLJST-REEL 制造商:AD 制造商全稱:Analog Devices 功能描述:AC ’97 SoundMAX㈢ Codec
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AD1981BLJSTZ2 制造商:AD 制造商全稱:Analog Devices 功能描述:AC ’97 SoundMAX㈢ Codec
AD1981BLJSTZ-REEL 制造商:Analog Devices 功能描述:Audio Codec 4ADC / 2DAC 20-Bit 48-Pin LQFP T/R
AD1981BLJSTZ-REEL2 制造商:AD 制造商全稱:Analog Devices 功能描述:AC ’97 SoundMAX㈢ Codec
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