參數(shù)資料
型號: AD1981BJST-REEL
廠商: Analog Devices Inc
文件頁數(shù): 1/32頁
文件大?。?/td> 0K
描述: IC CODEC STEREO MICPREAMP 48LQFP
標(biāo)準(zhǔn)包裝: 1
系列: SoundMAX®
類型: 音頻編解碼器 '97
數(shù)據(jù)接口: 串行
分辨率(位): 16,20 b
ADC / DAC 數(shù)量: 4 / 2
三角積分調(diào)變:
動態(tài)范圍,標(biāo)準(zhǔn) ADC / DAC (db): 85 / 90
電壓 - 電源,模擬: 4.5 V ~ 5.5 V
電壓 - 電源,數(shù)字: 3 V ~ 3.47 V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 48-LQFP
供應(yīng)商設(shè)備封裝: 48-LQFP(7x7)
包裝: 標(biāo)準(zhǔn)包裝
其它名稱: AD1981BJSTREELDKR
AC ’97 SoundMAX Codec
AD1981B
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.326.8703
2005 Analog Devices, Inc. All rights reserved.
AC ’97 2.3 COMPATIBLE FEATURES
S/PDIF output, 20-bit data format, supporting
48 kHz and 44.1 kHz sample rates
Integrated stereo headphone amplifier
Variable sample rate audio
External audio power-down control
>90 dB dynamic range
Stereo full-duplex codec
20-bit PCM DAC
3 analog line-level stereo inputs for line-in, AUX, and CD
Mono line-level phone input
Dual MIC input with built-in programmable preamplifier
High quality CD input with ground sense
Mono output for speakerphone or internal speaker
power management support
48-lead LQFP package, Pb-free available
ENHANCED FEATURES
Stereo MIC preamplifier support
Built-in digital equalizer function for optimized
speaker sound
Full-duplex variable sample rates from 7040 Hz to
48 kHz with 1 Hz resolution
Jack sense pins for automatic output switching
Software-programmed VREFOUT output for biasing
microphone and external power amplifier
Split power supplies: 3.3 V digital and 5 V analog
Multiple codec configuration options
FUNCTIONAL BLOCK DIAGRAM
A
M
MIC1
MIC2
PHONE_IN
CD_L
CD_GND
CD_R
AUX_L
AUX_R
LINE_IN_L
MIC PREAMP
MONO_OUT
HP_OUT_L
HP
MZ
LINE_OUT_L
MZ
LINE_OUT_R
HP_OUT_R
HP
OU
T
P
U
T
SEL
EC
T
O
R
G = GAIN
A = ATTENUATION
M = MUTE
Z = HIGH Z
GA
PCM FRONT
DAC RATE
M
M
PCM L/R
ADC RATE
RE
CO
RD
SEL
EC
T
O
R
G
LINE_IN_R
CODEC CORE
EAPD
PLL
XTL_OUT XTL_IN SPDIF
SPDIF
TX
ID0
ID1
RESET
ADC
AND
DAC
SLOT
LOGIC
SYNC
BIT_CLK
SDATA_OUT
SDATA_IN
E
Q
CO
RE
S
T
O
RAG
E
JS0
JS1
EAPD
AD1981B
G
2CMI
C
MI
X
A
M
A
M
GA
M
GA
M
GA
M
GA
M
GA
M
GA
M
GA
M
GA
M
GA
M
EQ
B
YPA
SS
EQ
G
AC
'
9
7
IN
T
E
RF
AC
E
M
G
M
G
MS
ANALOG MIXING
CONTROL LOGIC
AC '97
CONTROL
REGISTERS
VREFOUT
VREF
B
YPA
SS
16-BIT
Σ- ADC
16-BIT
Σ- ADC
16-BIT
Σ- ADC
16-BIT
Σ- ADC
20-BIT
Σ- DAC
20-BIT
Σ- DAC
CD
DIFF AMP
03091-001
VOLTAGE
REFERENCE
Figure 1.
OBSOLETE
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