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參數(shù)資料
| 型號： | AD1895AYRSZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 1/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CONV SAMPLE RATE ASYNC 28SSOP |
| 標準包裝： | 47 |
| 類型： | 采樣率轉(zhuǎn)換器 |
| 應用： | 車載音頻，接收器，機頂盒 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 28-SSOP（0.209"，5.30mm 寬） |
| 供應商設備封裝： | 28-SSOP |
| 包裝： | 管件 |
| 產(chǎn)品目錄頁面： | 776 (CN2011-ZH PDF) |
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
a
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703
Analog Devices, Inc., 2002
AD1895
192 kHz Stereo Asynchronous
Sample Rate Converter
FUNCTIONAL BLOCK DIAGRAM
VDD_IO VDD_CORE
SERIAL
INPUT
FIFO
FSOUT
FSIN
SERIAL
OUTPUT
DIGITAL
PLL
FIR
FILTER
CLOCK DIVIDER
ROM
AD1895
BYPASS
MUTE_OUT
MUTE_IN
SDATA_I
SCLK_I
LRCLK_I
SMODE_IN_0
SMODE_IN_1
SMODE_IN_2
MCLK_IN
MCLK_OUT
MMODE_0
MMODE_2
MMODE_1
WLNGTH_OUT_0
WLNGTH_OUT_1
SMODE_OUT_0
SMODE_OUT_1
TDM_IN
SDATA_O
SCLK_O
LRCLK_O
RESET
PRODUCT OVERVIEW
The AD1895 is a 24-bit, high performance, single-chip, second
generation asynchronous sample rate converter. Based upon
Analog Devices’ experience with its first asynchronous sample
rate converter, the AD1890, the AD1895 offers improved perfor-
mance and additional features. This improved performance
includes a THD + N range of –115 dB to –122 dB depending
on sample rate and input frequency, 128 dB (A-Weighted)
dynamic range, 192 kHz sampling frequencies for both input and
output sample rates, improved jitter rejection, and 1:8 upsampling
and 7.75:1 downsampling ratios. Additional features include
more serial formats, a bypass mode, and better interfacing to
digital signal processors.
The AD1895 has a 3-wire interface for the serial input and
output ports that supports left-justified, I
2S, and right-justified
(16-, 18-, 20-, 24-bit) modes. Additionally, the serial output
port supports TDM Mode for daisy-chaining multiple AD1895s to
a digital signal processor. The serial output data is dithered down
to 20, 18, or 16 bits when 20-, 18-, or 16-bit output data is
selected. The AD1895 sample rate converts the data from the
serial input port to the sample rate of the serial output port. The
sample rate at the serial input port can be asynchronous with
respect to the output sample rate of the output serial port. The
master clock to the AD1895, MCLK, can be asynchronous to
both the serial input and output ports.
MCLK can either be generated off-chip or on-chip by the AD1895
master clock oscillator. Since MCLK can be asynchronous to the
input or output serial ports, a crystal can be used to generate
MCLK internally to reduce noise and EMI emissions on the
board. When MCLK is synchronous to either the output or input
serial port, the AD1895 can be configured in a master mode where
MCLK is divided down and used to generate the left/right
and bit clocks for the serial port that is synchronous to MCLK.
The AD1895 supports master modes of 256
× fS, 512 × fS, and
768
× f
S for both input and output serial ports.
Conceptually, the AD1895 interpolates the serial input data by
a rate of 2
20 and samples the interpolated data stream by the
output sample rate. In practice, a 64-tap FIR filter with 2
20
polyphases, a FIFO, a digital servo loop that measures the time
difference between input and output samples within 5 ps, and a
digital circuit to track the sample rate ratio are used to perform
the interpolation and output sampling. Refer to the Theory of
Operation section. The digital servo loop and sample rate ratio
circuit automatically track the input and output sample rates.
(continued on page 15)
FEATURES
Automatically Senses Sample Frequencies
No Programming Required
Attenuates Sample Clock Jitter
3.3 V to 5 V Input and 3.3 V Core Supply Voltages
Accepts 16-/18-/20-/24-Bit Data
Up to 192 kHz Sample Rate
Input/Output Sample Ratios from 7.75:1 to 1:8
Bypass Mode
Multiple AD1895 TDM Daisy-Chain Mode
128 dB Signal-to-Noise and Dynamic Range
(A-Weighted, 20 Hz to 20 kHz BW)
Up to –122 dB THD + N
Linear Phase FIR Filter
Hardware Controllable Soft Mute
Supports 256
fS, 512
fS, or 768
fS Master Mode
Clock
Flexible 3-Wire Serial Data Port with Left-Justified,
I2S, Right-Justified (16-, 18-, 20-, 24-Bit), and TDM
Serial Port Modes
Master/Slave Input and Output Modes
28-Lead SSOP Plastic Package
APPLICATIONS
Home Theater Systems, Automotive Audio Systems,
DVD, DVD-R, CD-R, Set-Top Boxes, Digital Audio
Effects Processors
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相關代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD1895AYRSZRL | 功能描述:IC SAMP-RATEHP/CONV 24BIT 28SSOP RoHS:是 類別:集成電路 (IC) >> 線性 - 音頻處理 系列:- 其它有關文件:STA321 View All Specifications 標準包裝:1 系列:Sound Terminal™ 類型:音頻處理器 應用:數(shù)字音頻 安裝類型:表面貼裝 封裝/外殼:64-LQFP 裸露焊盤 供應商設備封裝:64-LQFP EP（10x10） 包裝:Digi-Reel® 其它名稱:497-11050-6 |
| AD1895YRS | 制造商:Rochester Electronics LLC 功能描述:192KHZ 8:1 STEREO ASYNC S - Bulk |
| AD1895YRSRL | 制造商:Rochester Electronics LLC 功能描述:192KHZ 8:1 STEREO ASYNC S - Bulk |
| AD1896 | 制造商:AD 制造商全稱:Analog Devices 功能描述:192 kHz Stereo Asynchronous Sample Rate Converter |
| AD1896AYRS | 制造商:Analog Devices 功能描述:Sample Rate Converter 28-Pin SSOP 制造商:Rochester Electronics LLC 功能描述:192KHZ 8:1 STEREO ASYNC SAMPLE RATE CONV - Bulk 制造商:Analog Devices 功能描述:IC STEREO ASR CONVERTER |
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