參數(shù)資料
型號: AD1892JRRL
廠商: ANALOG DEVICES INC
元件分類: 消費家電
英文描述: Integrated Digital Receiver/Rate Converter
中文描述: SPECIALTY CONSUMER CIRCUIT, PDSO28
封裝: SOIC-28
文件頁數(shù): 19/24頁
文件大?。?/td> 231K
代理商: AD1892JRRL
AD1892
REV. 0
–19–
Q0
Q1
Q2
Q3
Q4
Q5
21
20
19
18
17
15
D0
D1
D2
D3
D4
D5
CE
CLK
D TYPE
REGISTER
16
23
CA
CB
CC
CD
CE
CON/
PRO
CSCLK
SYNC
SYNCHRONIZATION
INPUT
TO LEDS,
m
CONTROLLER,
DSP, ETC.
FROM DSP,
m
CONTROLLER,
SWITCH, ETC.
CHANNEL STATUS REGISTER
CS
CCLK
SDI
SDO
MCLK
AD1857
DAC
+2
6
1
MCLK
384/
256
MUTE
PD/RST
QDFS
NOSIG
ERROR
INT
U/CBIT
AD1892
SFCLK
OUTL
OUTR
8
13
3
2
4
5
28
27
1
8
9
10
11
12
6
512 x F
SOUT
CLOCK
ACTIVE HI MUTE
ACTIVE LO POWER-DOWN/RESET
Q-CHANNEL SUBCODE BLOCK START
NO BIPHASE-MARK
SIGNAL ON INPUT
CE
CLK
D TYPE
REGISTER
D0
D1
D2
Q0
Q1
Q2
SUB-FRAME STATUS REGISTER
USER/CHANNEL STATUS BIT
FROM DSP,
CONTROLLER,
SWITCH, ETC.
CS
CCLK
SDO
SDI
LEFT LINE OUTPUT
RIGHT LINE OUTPUT
INTERRUPTS
ERROR BIT =
PARITY ERROR
OR VALIDITY ERROR
INTERRUPT =
TRACK NUMBER CHANGE
OR CHANNEL STATUS
CHANGE
OPTIONAL
SPI COMPATIBLE
MICROCONTROLLER
OR MICROPROCESSOR
DV
DD
DGND
0.01
m
F
7
22
+5V
26
24
25
BCLK
SDATA
L
R
CLK
SCLK
SDATA
L
R
CLK
19
20
18
110
V
AES/EBU INPUT
3V–10V p-p
1:1
1
4
2
1
2
3
1
3
2
DVDD
BAT54S OR BAS70-04
16R5
16R5
1
3
2
DVDD
BAT54S OR BAS70-04
DVDD
1k
V
1k
V
RXP
RXN
AD1892
10nF
10nF
38R3
38R3
13
14
RXP
RXN
14
0.01
m
F
0.01
m
F
75
V
CONSUMER
S/PDIF INPUT
75
CONN
RCA PHONE
CONNECTOR
13
Figure 33. Microcontroller Application Circuit
MCLK
AD1892
MCLK
AD1892
MCLK
AD1892
28
28
28
23
512 x F
SOUT
SYNC
23
SYNC
23
SYNC
4
512
SYSTEM WORD
CLOCK
Figure 32. Multiple AD1892 Synchronization Using SYNC
Mute
The AD1892 offers two methods of muting the digital audio
output. There is an external mute input (MUTE, Pin 27) that
“hardware” mutes the AD1892 digital audio output when
asserted HI. This input should be LO for normal operation. The
AD1892 digital audio output can also be “software” muted
through a write to Control Register 1, position D7. Writing a 1
mutes the digital audio output; writing a 0 (default) unmutes
the output.
The AD1892 mutes the digital audio output automatically when
the digital audio receiver is not locked to the incoming biphase
mark encoded stream, or when no biphase-mark signal is ap-
plied to the input of the AD1892 (i.e., NOSIG = 1). When
NOSIG is deasserted (LO), the digital audio output from the
AD1892 is immediately unmuted. The AD1892 automatically
repeats the last valid sample when a parity error or validity error
is encountered.
APPLICATIONS CIRCUITS
A typical microcontroller-oriented application circuit for the
AD1892 is shown in Figure 33.
A typical stand-alone application circuit for the AD1892 is
shown in Figure 34.
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