
REV. 0
AD1886A
–18–
Subsection Ready Register (Index 26h)
u
u
u
N m
u
u
Re
R g
e
m
a
N
1
D 5
1
D 4
1
D 3
1
D 2
D 1
1
D 0
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
t
u
a
f
D
6
2 h
t
a
t
S
/
n
C
n
w
o
D
-
r
e
w
o
P
X
R
P 6
R
P 5
R
P 4
R
P 3
R
P 2
R
P 1
R
P 0
X
X
X
X
E
R F
N
A L
A
D C
D
A C
NA
Note: The ready bits are read only; writing to REF, ANL, DAC, ADC will have no effect. These bits indicate the status for the
AD1886A subsections. If the bit is a one, that subsection is “ready.” Ready is defined as the subsection able to perform in its
nominal state.
ADC
ADC section ready to transmit data.
DAC
DAC section ready to accept data.
ANL
Analog gainuators, attenuators, and mixers ready.
REF
Voltage References, V
REF
and V
REFOUT
up to nominal level.
PR[6:0]
AD1886A Power-Down Modes. The first three bits are to be used individually rather than in combination with
each other. The last bit, PR3, can be used in combination with PR2 or by itself. The mixer and reference cannot
be powered down via PR3 unless the ADCs and DACs are also powered down. Nothing else can be powered up
until the reference is up.
PR0—Power-Down ADC
PR1—Power-Down DAC
PR2—Power-Down Analog Mixer
PR3—Power-Down V
REF
and V
REFOUT
PR4—Power-Down AC-Link
PR5—Power-Down Internal Clock
PR6—Power-Down Headphone
PR5 has no effect unless all ADCs, DACs, and the AC-Link are powered down. The reference and the mixer can be
either up or down, but all power-up sequences must be allowed to run to completion before PR5 and PR4 are both set.
In multiple-codec systems, the master codec’s PR5 and PR4 bits control the slave codec. PR5 is also effective in
the slave codec if the master’s PR5 bit is clear, but the PR4 bit has no effect except to enable or disable PR5.
Power-Down State
PR6
PR5
PR4
PR3
PR2
PR1
PR0
ADC Power-Down
DAC Power-Down
ADC and DAC Power-Down
Mixer Power-Down
ADC + Mixer Power-Down
DAC + Mixer Power-Down
ADC + DAC + Mixer Power-Down 0
Standby
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
1
0
0
0
1
1
1
1
1
0
1
1
0
0
1
1
1
1
0
1
0
1
0
1
1
1
Extended Audio ID Register (Index 28h)
e
e
e
R g
e
e
u
u
u
N m
u
u
Note: The Extended Audio ID is a read only register.
VRA
Variable Rate Audio. VRA = 1 indicates support for Variable Rate Audio.
SPDF
“1” indicates SPDIF support, “0” indicates no SPDIF support.
ID[1:0]
ID1, ID0 is a 2-bit field which indicates the codec configuration.
e
m
a
N
1
D 5
1
D 4
1
D 3
1
D 2
D 1
1
D 0
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
t
u
a
f
D
D
8
2 h
D
I
o
i
d
u
A
d
e
d
n
e
x
E
D
D
D
D
I 1
D
D
D
D
D
I 0
D
X
X
X
X
X
X
X
X
X
X
X
F
D
P
S
X
R
V A
h
1
0
0
0