參數(shù)資料
型號(hào): AD1881
廠商: Analog Devices, Inc.
英文描述: SNAPAKMAGNETICCIRCUITBREAKER
中文描述: AC\u0026#39;97聲卡SoundMAX編解碼器
文件頁(yè)數(shù): 18/26頁(yè)
文件大?。?/td> 261K
代理商: AD1881
AD1881A
–18–
REV. 0
Extended Audio Status and Control Register (Index 2Ah)
u
u
u
u
N m
u
e
R g
e
m
a
N
1
D 5
1
D 4
1
D 3
1
D 2
D 1
1
D 0
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
t
u
a
f
D
A
2 h
l
C
/
S
o
i
d
u
A
d
e
d
n
e
x
E
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
R
V A
h
0
0
0
0
Note: The Extended Audio Status and Control Register is a read/write register that provides status and control of the extended audio
features.
VRA
Variable Rate Audio. VRA = 1 enables Variable Rate Audio mode (sample rate control registers and SLOTREQ
signaling.
PCM DAC Rate Register (Index 2Ch)
u
u
u
u
N m
u
e
R g
e
m
a
N
1
D 5
1
D 4
1
D 3
1
D 2
D 1
1
D 0
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
u
t
a
f
D
)
h
A
7
(
h
C
2
a
e
a
R
C
A
D
M
C
P
5
1
R
S
4
1
R
S
3
1
R
S
2
1
R
S
1
1
R
S
0
1
R
S
R
S 9
R
S 8
R
S 7
R
S 6
R
S 5
R
S 4
R
S 3
R
S 2
R
S 1
R
S 0
h
0
8
B
B
Note: 2Ch is an alias for 7Ah. The VRA bit in register 2Ah must be set for the alias to work; if a zero is written to VRA, both sample
rates are reset to 48k.
SR[15:0]
Writing to this register allows programming of the sampling frequency from 8 kHz (1B80h) to 48 kHz (BB80h) in
1 Hz increments. Programming a value outside of the range 7040 Hz (1b80h) to 48000 Hz (bb80h) causes the codec
to saturate to 48 kHz if a rate greater than 48 kHz is programmed or to 7.040 kHz if a rate less than 7.040 kHz is
programmed. For all rates, if the value written to the register is supported, that value will be echoed back when read,
otherwise the closest rate supported is returned.
PCM ADC Rate Register (Index 32h)
u
u
u
u
N m
u
e
R g
e
m
a
N
1
D 5
1
D 4
1
D 3
1
D 2
D 1
1
D 0
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
u
t
a
f
D
)
h
8
7
(
h
h
2
3
e
a
e
a
R
C
D
A
M
C
P
5
1
R
S
4
1
R
S
3
1
R
S
2
1
R
S
1
1
R
S
0
1
R
S
R
SR
S 9
R
SR
S 8
R
SR
S 7
R
SR
S 6
R
SR
S 5
R
SR
S 4
R
SR
S 3
R
SR
S 2
R
SR
S 1
R
SR
S 0
h
0
8
B
B
Note: 32h is an alias for 78h. The VRA bit in register 2Ah must be set for the alias to work; if a zero is written to VRA, both sample
rates are reset to 48k.
SR[15:0]
Writing to this register allows programming of the sampling frequency from 8 kHz (1B80) to 48 kHz (BB80h) in
1 Hz increments. Programming a value outside of the range 7040 Hz (1b80h) to 48000 Hz (bb80h) causes the codec to
saturate to 48 kHz if a rate greater than 48 kHz is programmed, or to 7.040 kHz if a rate less than 7.040 kHz
is programmed. For all rates, if the value written to the register is supported, that value will be echoed back
when read, otherwise the closest rate supported is returned.
Serial Configuration (Index 74h)
u
u
u
u
N m
u
e
R g
e
m
a
N
1
D 5
1
D 4
1
D 3
1
D 2
D 1
1
D 0
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
t
u
a
f
D
4
7 h
l
e
n
o
C
S
n
o
i
a
r
u
g
T
O
L
S
16
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
h
x
0
x
7
Note: This register is not reset when the reset register (register 00h) is written.
SLOT16
Enable 16-bit slots.
DRQEN and DxRQx are retained only for compatibility with the AD1819. New controller designs should use the VRA bit in register
2Ah and the request bits in the status address slot instead.
If your system uses only a single AD1881A, you can ignore the register mask and the slave 1/slave 2 request bits. If you write to
this register, write ones to all of the register mask bits.
SLOT16 makes all AC Link slots 16 bits in length, formatted into 16 slots.
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