參數(shù)資料
型號(hào)： AD1837AASZ
廠商： ANALOG DEVICES INC
元件分類： 消費(fèi)家電
英文描述： COIL 82UH 450MA CHOKE SMD
中文描述： SPECIALTY CONSUMER CIRCUIT, PQFP52
封裝： LEAD FREE, PLASTIC, MS-022AC, MQFP-52
文件頁(yè)數(shù)： 22/24頁(yè)
文件大?。?/td> 401K
代理商： AD1837AASZ
REV. A
AD1837A
–22–
CASCADE MODE
Dual AD1837A Cascade
The AD1837A can be cascaded to an additional AD1837A,
which, in addition to six external stereo ADCs, can be used to
create a 32-channel audio system with 16 inputs and 16 outputs.
The cascade is designed to connect to a SHARC DSP and operates
in a time division multiplexing (TDM) format. Figure 14 shows
the connection diagram for cascade operation. The digital inter-
face for both parts must be set to operate in Auxiliary 512 mode
by programming ADC Control Register 2. AD1837A No. 1 is
set as a master device by connecting the
M
/S pin to DGND and
AD1837A No.2 is set as a slave device by connecting the
M
/S to
ODVDD. Both devices should be run from the same MCLK
and
PD
/
RST
signals to ensure that they are synchronized.
With Device 1 set as a master, it will generate the frame-sync
and bit clock signals. These signals are sent to the SHARC and
Device 2 ensuring that both know when to send and receive data.
The cascade can be thought of as two 256-bit shift registers, one
for each device. At the beginning of a sample interval, the shift
registers contain the ADC results from the previous sample
interval. The first shift register (Device 1) clocks data into the
SHARC and also clocks in data from the second shift register
(Device 2). While this is happening, the SHARC is sending
DAC data to the second shift register. By the end of the sample
interval, all 512 bits of ADC data in the shift registers will have
been clocked into the SHARC and been replaced by DAC data,
which is subsequently written to the DACs. Figure 15 shows the
timing diagram for the cascade operation.
AUX ADC
(SLAVE)
L
ALRCLK
ABCLK
ASDATA
DSDATA
ALRCLK
ABCLK
ASDATA
DSDATA
AD1837A NO. 1
(MASTER)
AD1837A NO. 2
(SLAVE)
SHARC
(SLAVE)
D
B
AUX ADC
(SLAVE)
L
D
B
AUX ADC
(SLAVE)
L
D
B
AUX ADC
(SLAVE)
L
D
B
AUX ADC
(SLAVE)
L
D
B
AUX ADC
(SLAVE)
L
D
B
A
A
A
A
A
A
A
A
A
A
DRx
RFSx
RCLKx
TCLKx
DTx
TFSx
Figure 14. AD1837A Cascade
AD1837A NO. 1 DACs
L1
L2
L3
L4
R1
R2
R3
R4
AD1837A NO. 2 DACs
L1
L2
L3
L4
R1
R2
R3
R4
TFSx/
RFSx
DTx
AD1837A NO. 1 ADCs
L1
L2
L3
L4
R1
R2
R3
R4
AD1837A NO. 2 ADCs
L1
L2
L3
L4
R1
R2
R3
R4
DRx
256 ABCLKs
256 ABCLKs
MSB
MSB – 1
LSB
32 ABCLKs
ABCLK
DTx
MSB
LSB
DRx
DON’T CARE
MSB – 1
Figure 15. AD1837A Cascade Timing
相關(guān)PDF資料
PDF描述
AD1837A 2 ADC, 8 DAC, 96 kHz, 24-Bit Codec
AD1837AAS 2 ADC, 8 DAC, 96 kHz, 24-Bit Codec
AD1837AAS-REEL 2 ADC, 8 DAC, 96 kHz, 24-Bit Codec
AD1837AASZ-REEL 2 ADC, 8 DAC, 96 kHz, 24-Bit Codec
AD1837 2 ADC, 8 DAC, 96 kHz, 24-Bit Codec
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD1837AASZ-REEL 制造商:Analog Devices 功能描述:Audio Codec 2ADC / 8DAC 24-Bit 52-Pin MQFP T/R
AD1837AS 制造商:Analog Devices 功能描述:Audio Codec 2ADC / 8DAC 24-Bit 52-Pin MQFP 制造商:Rochester Electronics LLC 功能描述:- Bulk
AD1837AS-REEL 制造商:Analog Devices 功能描述:Audio Codec 2ADC / 8DAC 24-Bit 52-Pin MQFP T/R
AD1838 制造商:AD 制造商全稱:Analog Devices 功能描述:2 ADC, 6 DAC,96 kHz, 24-Bit Codec
AD1838A 制造商:AD 制造商全稱:Analog Devices 功能描述:2 ADC, 6 DAC, 96KHZ 24 BIT CODEC
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