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參數(shù)資料
| 型號： | AD1836AASZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 13/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CODEC 4ADC/6DAC 24 BIT 52MQFP |
| 產(chǎn)品培訓(xùn)模塊： | Interfacing AV Converters to Blackfin Processors |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 類型： | 通用 |
| 數(shù)據(jù)接口： | 串行 |
| 分辨率（位）： | 24 b |
| ADC / DAC 數(shù)量： | 4 / 6 |
| 三角積分調(diào)變： | 是 |
| S/N 比，標(biāo)準(zhǔn) ADC / DAC (db)： | 105 / 108 |
| 動態(tài)范圍，標(biāo)準(zhǔn) ADC / DAC (db)： | 105 / 108 |
| 電壓 - 電源，模擬： | 4.75 V ~ 5.25 V |
| 電壓 - 電源，數(shù)字： | 4.75 V ~ 5.25 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 52-QFP |
| 供應(yīng)商設(shè)備封裝： | 52-MQFP（10x10） |
| 包裝： | 托盤 |
| 產(chǎn)品目錄頁面： | 776 (CN2011-ZH PDF) |
| 配用： | AD1836AZ-DBRD-ND - BOARD EVAL FOR AD1836A |
AD1836A
Data Sheet
Rev. A | Page 20 of 24
Table 15. DAC Control Register 2
Address
RD/WR
Reserved
DAC Mute
DAC3R
DAC3L
DAC2R
DAC2L
DAC1R
DAC1L
15, 14, 13, 12
11
10, 9, 8, 7, 6
5
4
3
2
1
0
0001
0
00000
0 = On
1 = Mute
0 = On
1 = Mute
0 = On
1 = Mute
0 = On
1 = Mute
0 = On
1 = Mute
0 = On
1 = Mute
Table 16. DAC Volume Registers
Address
RD/WR
Reserved
Function
Volume
15, 14, 13, 12
11
10
9:0
0010: DAC1L
0011: DAC1R
0100: DAC2L
0101: DAC2R
0110: DAC3L
0111: DAC3R
0
0 to 1023 in 1024 Linear Steps
Table 17. ADC Control Register 1
Address
RD/WR
Reserved
Function
Filter
Power-Down
Sample Rate
Left Gain
Right Gain
15, 14, 13, 12
11
10, 9
8
7
6
5, 4, 3
2, 1, 0
1100
0
00
0 = DC
1 = High Pass
0 = Normal
1 = PWRDWN
0 = 48 kHz
1 = 96 kHz
000 = 0 dB
001 = 3 dB
010 = 6 dB
011 = 9 dB
100 = 12 dB
101 = Reserved
110 = Reserved
111 = Reserved
000 = 0 dB
001 = 3 dB
010 = 6 dB
011 = 9 dB
100 = 12 dB
101 = Reserved
110 = Reserved
111 = Reserved
Table 18. ADC Control Register 2
Packed Mode: Eight channels are “packed” in ASDATA1 serial output. Packed Mode 128: Refer to Figure 5. Packed Mode 256: Refer to Figure 6.
Packed Mode AUX: Refer to Figure 9 to Figure 11. Note that Packed AUX mode affects the entire chip, including the DAC serial mode.
Address
RD/WR
Reserved
Master/Slave
AUX Mode
SOUT Mode
Word Width
ADC Mute
ADC2R
ADC2L
ADC1R
ADC1L
15, 14, 13, 12
11
10
9
8, 7, 6
5, 4
3
2
1
0
1101
0
0 = Slave
1 = Master
000 = I2S
001 = RJ
010 = DSP
011 = LJ
100 = Packed Mode 256
101 = Packed Mode 128
110 = Packed Mode AUX
00 = 24 Bits
01 = 20 Bits
10 = 16 Bits
11 = Reserved
0 = On
1 = Mute
0 = On
1 = Mute
0 = On
1 = Mute
0 = On
1 = Mute
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD1836AASZKL1 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Analog Devices 功能描述: |
| AD1836AASZRL | 功能描述:IC CODEC 4ADC/6DAC 24BIT 52MQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 編解碼器 系列:- 標(biāo)準(zhǔn)包裝:2,500 系列:- 類型:PCM 數(shù)據(jù)接口:PCM 音頻接口 分辨率（位）:15 b ADC / DAC 數(shù)量:1 / 1 三角積分調(diào)變:是 S/N 比，標(biāo)準(zhǔn) ADC / DAC (db):- 動態(tài)范圍，標(biāo)準(zhǔn) ADC / DAC (db):- 電壓 - 電源，模擬:2.7 V ~ 3.3 V 電壓 - 電源，數(shù)字:2.7 V ~ 3.3 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:80-VFBGA 供應(yīng)商設(shè)備封裝:80-BGA MICROSTAR JUNIOR（5x5） 包裝:帶卷 (TR) 其它名稱:296-21257-2 |
| AD1836ACS | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| AD1836ACSRL | 制造商:AD 制造商全稱:Analog Devices 功能描述:Multichannel 96 kHz Codec |
| AD1836ACSZ | 功能描述:IC CODEC 4ADC/6DAC 24 BIT 52MQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 編解碼器 系列:- 標(biāo)準(zhǔn)包裝:2,500 系列:- 類型:立體聲音頻 數(shù)據(jù)接口:串行 分辨率（位）:18 b ADC / DAC 數(shù)量:2 / 2 三角積分調(diào)變:是 S/N 比，標(biāo)準(zhǔn) ADC / DAC (db):81.5 / 88 動態(tài)范圍，標(biāo)準(zhǔn) ADC / DAC (db):82 / 87.5 電壓 - 電源，模擬:2.6 V ~ 3.3 V 電壓 - 電源，數(shù)字:1.7 V ~ 3.3 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-WFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:48-TQFN-EP（7x7） 包裝:帶卷 (TR) |
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