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參數(shù)資料
| 型號(hào)： | AD1836 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | ECONOLINE: RD & RC - Dual Output from a Single Input Rail- 1kVDC & 2kVDC Isolation- Power Sharing on Output- Custom Solutions Available- UL94V-0 Package Material- Efficiency to 86% |
| 中文描述： | 多通道96 kHz的編解碼器 |
| 文件頁(yè)數(shù)： | 14/18頁(yè) |
| 文件大?。?/td> | 878K |
| 代理商： | AD1836 |
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PRELIMINARY TECHNICAL DATA
REV. PrC
AD1836
–14–
AUXDATA1
ASDATA2/DAUXDATA
DATA TO EXT DAC
BCLK AND LRCLK FOR
EXT DAC COMES FROM
ADC BCLK, LRCLK.
MUST BE IN 1
S MODE
ADC
SYNC SIGNAL DERIVED FROM AUXLRCLK USED TO
RESET INTERNAL ADC COUNTER
ASDATA1
AUXDATA
1
2
S FORMATTER
MUX
AUXLRCLK
2 AUX
CHANNELS
6-CH
DAC
6 MAIN
CHANNELS
DAC
SPORT
DSDATA1
DSDATA2
DSDATA3
LRCLK
BCLK
SPORT
SYNC
4 ADC
S
AUXBCLK
AUXLRCLK
AUXDATA2
1
2
S
DECODE
LRCLK
ABCLK
ASDATA1
ALRCLK
ABCLK
ASDATA1
DATA TO SHARC
INDICATES MUX POSITION FOR AUX-TDM MODE
MASTER/SLAVE MODE,
FROM ADC SPI PORT
FROM SHARC
FROM EXT A/D
FROM EXT A/D
DSDATA1
DSDATA2/AUXDATA1
DSDATA3/AUXDATA2
DLRCLK/AUXLRCLK
MCLK
1
2
S
TIMING GEN
LRCLK BCLK
MUX
DBCLK/AUXBCLK
MUX
AUXBCLK
Figure 11. Extended TDM Mode Internal Flow Diagram
Table I. Pin Function Changes in AUX-Mode
Pin Name (I
2
S/AUX-Mode)
I
2
S-Mode
I
2
S Data Out, Internal ADC1
I
2
S Data Out, Internal ADC2
I
2
S Data In, Internal DAC1
I
2
S Data In, Internal DAC2
I
2
S Data in Internal DAC3
LRCLK for Internal ADC1, 2
BCLK for Internal ADC1, 2
LRCLK In/Out Internal DACs
AUX-Mode
ASDATA1(O)
ASDATA2(O)/DAUXDATA(O)
DSDATA1(I)
DSDATA2(I)/AAUXDATA(I)
DSDATA3(I)/AAUXDATA2(I)
ALRCLK(O)
ABCLK(O)
DLRCLK(I)/AUXLRCLK(I/O)
TDM Data Out, to SHARC
AUX–I
2
S-Data Out (to Ext. DAC)
TDM Data In, from SHARC
AUX–I
2
S-Data in 1 (from Ext. ADC)
AUX–I
2
S-Data in 2 (from Ext. ADC)
TDM Frame Sync Out, to SHARC
TDM BCLK Out, to SHARC
AUX LRCLK IN/OUT, Driven by Ext. IRCLK
from ADC (in Slave Mode). In Master Mode,
Driven by Internal MCLK/512.
AUX BCLK IN/OUT, Drive by Ext. BCLK
from ADC (in Slave Mode). In Master Mode,
Driven by Internal MCLK/8.
DBCLK(I)/AUXBCLK(I/O)
BCLK In/Out Internal DACs
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AD1836AS | COIL 33UH 700MA CHOKE SMD |
| AD1837AASZ | COIL 82UH 450MA CHOKE SMD |
| AD1837A | 2 ADC, 8 DAC, 96 kHz, 24-Bit Codec |
| AD1837AAS | 2 ADC, 8 DAC, 96 kHz, 24-Bit Codec |
| AD1837AAS-REEL | 2 ADC, 8 DAC, 96 kHz, 24-Bit Codec |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD1836A | 制造商:AD 制造商全稱:Analog Devices 功能描述:Multichannel 96 kHz Codec |
| AD1836AAS | 制造商:Analog Devices 功能描述:Audio Codec 2ADC / 3DAC 24-Bit 52-Pin MQFP 制造商:Rochester Electronics LLC 功能描述:MULTI CHANNEL 96 KHZ CODEC - Bulk 制造商:Analog Devices 功能描述:IC CODEC 96KHZ SMD 1836 MQFP52 |
| AD1836AASRL | 制造商:Analog Devices 功能描述:Audio Codec 2ADC / 3DAC 24-Bit 52-Pin MQFP T/R |
| AD1836AASZ | 功能描述:IC CODEC 4ADC/6DAC 24 BIT 52MQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 編解碼器 系列:- 標(biāo)準(zhǔn)包裝:2,500 系列:- 類型:PCM 數(shù)據(jù)接口:PCM 音頻接口 分辨率（位）:15 b ADC / DAC 數(shù)量:1 / 1 三角積分調(diào)變:是 S/N 比，標(biāo)準(zhǔn) ADC / DAC (db):- 動(dòng)態(tài)范圍，標(biāo)準(zhǔn) ADC / DAC (db):- 電壓 - 電源，模擬:2.7 V ~ 3.3 V 電壓 - 電源，數(shù)字:2.7 V ~ 3.3 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:80-VFBGA 供應(yīng)商設(shè)備封裝:80-BGA MICROSTAR JUNIOR（5x5） 包裝:帶卷 (TR) 其它名稱:296-21257-2 |
| AD1836AASZKL1 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Analog Devices 功能描述: |
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