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參數(shù)資料
| 型號： | AD1674K |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | 12-Bit 100 kSPS A/D Converter |
| 中文描述： | 12位100 kSPS的A / D轉(zhuǎn)換 |
| 文件頁數(shù)： | 8/12頁 |
| 文件大?。?/td> | 255K |
| 代理商： | AD1674K |
AD1674
REV. C
–8–
DE FINIT ION OF SPE CIFICAT IONS
INT E GRAL NONLINE ARIT Y (INL)
T he ideal transfer function for an ADC is a straight line drawn
between “zero” and “full scale.” T he point used as “zero”
occurs 1/2 LSB before the first code transition. “Full scale” is
defined as a level 1 1/2 L SB beyond the last code transition.
Integral nonlinearity is the worst-case deviation of a code from
the straight line. T he deviation of each code is measured from
the middle of that code.
DIFFE RE NT IAL NONLINE ARIT Y (DNL)
A specification which guarantees no missing codes requires that
every code combination appear in a monotonic increasing
sequence as the analog input level is increased. T hus every code
must have a finite width. T he AD1674 guarantees no missing
codes to 12-bit resolution; all 4096 codes are present over the
entire operating range.
UNIPOLAR OFFSE T
T he first transition should occur at a level 1/2 LSB above ana-
log common. Unipolar offset is defined as the deviation of the
actual transition from that point at 25
°
C. T his offset can be
adjusted as shown in Figure 11.
BIPOLAR OFFSE T
In the bipolar mode the major carry transition (0111 1111 1111
to 1000 0000 0000) should occur for an analog value 1/2 LSB
below analog common. T he bipolar offset error specifies the
deviation of the actual transition from that point at 25
°
C. T his
offset can be adjusted as shown in Figure 12.
FULL-SCALE E RROR
T he last transition (from 1111 1111 1110 to 1111 1111 1111
)
should occur for an analog value 1 1/2 LSB below the nominal
full scale (9.9963 volts for 10 volts full scale). T he full-scale
error is the deviation of the actual level of the last transition
from the ideal level at 25
°
C. T he full-scale error can be adjusted
to zero as shown in Figures 11 and 12.
T E MPE RAT URE DRIFT
T he temperature drifts for full-scale error, unipolar offset and
bipolar offset specify the maximum change from the initial
(25
°
C) value to the value at T
MIN
or T
MAX
.
POWE R SUPPLY RE JE CT ION
T he effect of power supply error on the performance of the
device will be a small change in full scale. T he specifications
show the maximum full-scale change from the initial value with
the supplies at various limits.
FRE QUE NCY -DOMAIN T E ST ING
T he AD1674 is tested dynamically using a sine wave input and
a 2048 point Fast Fourier T ransform (FFT ) to analyze the
resulting output. Coherent sampling is used, wherein the ADC
sampling frequency and the analog input frequency are related
to each other by a ratio of integers. T his ensures that an integral
multiple of input cycles is captured, allowing direct FFT pro-
cessing without windowing or digital filtering which could mask
some of the dynamic characteristics of the device. In addition,
the frequencies are chosen to he “relatively prime” (no common
factors) to maximize the number of different ADC codes that
are present in a sample sequence. T he result, called Prime
Coherent Sampling, is a highly accurate and repeatable measure
of the actual frequency-domain response of the converter.
NY QUIST FRE QUE NCY
An implication of the Nyquist sampling theorem, the “Nyquist
Frequency” of a converter is that input frequency which is one-
half the sampling frequency of the converter.
SIGNAL-T O-NOISE AND DIST ORT ION (S/N+D) RAT IO
S/(N+D) is the ratio of the rms value of the measured input sig-
nal to the rms sum of all other spectral components below the
Nyquist frequency, including harmonics but excluding dc. T he
value for S/(N+D) is expressed in decibels.
T OT AL HARMONIC DIST ORT ION (T HD)
T HD is the ratio of the rms sum of the first six harmonic com-
ponents to the rms value of a full-scale input signal and is ex-
pressed as a percentage or in decibels. For input signals or
harmonics that are above the Nyquist frequency, the aliased
component is used.
INT E RMODULAT ION DIST ORT ION (IMD)
With inputs consisting of sine waves at two frequencies, fa and
fb, any device with nonlinearities will create distortion products,
of order (m+n), at sum and difference frequencies of mfa
±
nfb,
where m, n = 0, 1, 2, 3. . . . Intermodulation terms are those for
which m or n is not equal to zero. For example, the second
order terms are (fa + fb) and (fa – fb) and the third order terms
are (2fa + fb), (2fa – fb), (fa + 2fb) and (fa – 2fb). T he IMD
products are expressed as the decibel ratio of the rms sum of the
measured input signals to the rms sum of the distortion terms.
T he two signals are of equal amplitude and the peak value of
their sums is –0.5 dB from full scale. T he IMD products are
normalized to a 0 dB input signal.
FULL-POWE R BANDWIDT H
T he full-power bandwidth is that input frequency at which the
amplitude of the reconstructed fundamental is reduced by 3 dB
for a full-scale input.
FULL-LINE AR BANDWIDT H
T he full-linear bandwidth is the input frequency at which the
slew rate limit of the sample-hold-amplifier (SHA) is reached.
At this point, the amplitude of the reconstructed fundamental
has degraded by less than –0.1 dB. Beyond this frequency, dis-
tortion of the sampled input signal increases significantly.
APE RT URE DE LAY
Aperture delay is a measure of the SHA’s performance and is
measured from the falling edge of Read/Convert (R/
C
) to when
the input signal is held for conversion.
APE RT URE JIT T E R
Aperture jitter is the variation in aperture delay for successive
samples and is manifested as noise on the input to the A/D.
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| AD1674A | 12-Bit 100 kSPS A/D Converter |
| AD1674KN | 12-Bit 100 kSPS A/D Converter |
| AD1674KR | 12-Bit 100 kSPS A/D Converter |
| AD1674T | 12-Bit 100 kSPS A/D Converter |
| AD1674TD | 12-Bit 100 kSPS A/D Converter |
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| AD1674KN | 功能描述:IC ADC 12BIT 100KSPS 28-DIP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 位數(shù):14 采樣率（每秒）:83k 數(shù)據(jù)接口:串行，并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:28-DIP（0.600"，15.24mm） 供應(yīng)商設(shè)備封裝:28-PDIP 包裝:管件 輸入數(shù)目和類型:1 個單端，雙極 |
| AD1674KNZ | 功能描述:IC ADC 12BIT 100KSPS 28-DIP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 位數(shù):14 采樣率（每秒）:83k 數(shù)據(jù)接口:串行，并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:28-DIP（0.600"，15.24mm） 供應(yīng)商設(shè)備封裝:28-PDIP 包裝:管件 輸入數(shù)目和類型:1 個單端，雙極 |
| AD1674KNZ | 制造商:Analog Devices 功能描述:A/D Converter (A-D) IC |
| AD1674KR | 功能描述:IC ADC 12BIT 100KSPS 28-SOIC RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 位數(shù):14 采樣率（每秒）:83k 數(shù)據(jù)接口:串行，并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:28-DIP（0.600"，15.24mm） 供應(yīng)商設(shè)備封裝:28-PDIP 包裝:管件 輸入數(shù)目和類型:1 個單端，雙極 |
| AD1674KR-REEL | 制造商:Analog Devices 功能描述:12-BIT, 100 KSPS, COMPLETE ADC - Tape and Reel |
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