參數(shù)資料
型號(hào)： AD1385KD
廠商： ANALOG DEVICES INC
元件分類： ADC
英文描述： 16-Bit 500 kHz Wide Temperature Range Sampling ADC
中文描述： 1-CH 16-BIT FLASH METHOD ADC, PARALLEL ACCESS, CDIP48
封裝： BOTTOM BRAZED, CERAMIC, DIP-48
文件頁(yè)數(shù)： 12/20頁(yè)
文件大?。?/td> 348K
代理商： AD1385KD
AD1385
REV. 0
–12–
No external switches or relays are required for calibration and
all connections to the AD1385 may remain in place. T he
T rack/Hold is internally isolated from the analog input by ana-
log switches and used as a buffer during the calibration process.
Its signal output (Pin 27)
must
remain connected to the A/D
input(s) (Pin 30 and/or Pin 31, as appropriate) for successful
calibration. Hold Command Out (Pin 19) must also remain
connected to Hold Command In (Pin 22), either via direct con-
nection (synchronous sampling) or with an external OR-gate
(asynchronous sampling, Figure 19).
A calibration sequence may be initiated at any time by bringing
the
CAL
input (Pin 41) low. T he calibration request remains
pending if a conversion is in process, and calibration begins on
the first rising clock edge after the end of that conversion. Cali-
bration begins on the first rising clock edge after
CAL
is as-
serted if the AD1385 is idle when calibration is requested. T he
minimum pulse width for the CAL input is 20 ns. T he
CAL
in-
put has priority over the Start Convert signal in all cases.
T he CAL Status output (Pin 28) goes high as soon as calibra-
tion begins and remains high until the calibration cycle is com-
pleted. Pulsing
CAL
low while CAL Status is high has no
effect. A full calibration requires about 15 ms with a 10 MHz
clock and proportionately longer with slower clocks.
Calibration has no effect on the contents of the Autozero regis-
ter. T he apparent zero point may shift a few LSBs as a result of
the calibration. Autozero after recalibration will provide the
greatest possible accuracy (see
Autozero).
T he AD1385 controller allocates 17 clock periods after the con-
clusion of a calibration cycle for T rack/Hold recovery and signal
acquisition. Activity at the Start Convert input during this
interval is ignored. Figure 23 shows the timing associated with
the resumption of synchronous conversions following a calibra-
tion cycle.
Start-Convert should remain low during the calibration period
when using asynchronous sampling (Figure 19).
Figure 23. Resumption of Synchronous Conversions
Following Completion of Calibration
T he
CAL
input may be held low indefinitely, causing repeated
calibration cycles. T he AD1385 will complete the calibration in
progress when
CAL
goes high and will then begin normal con-
versions after the 17-clock-period delay. T his simplifies the
system-level implementation of the power-up reset function.
T he AD1385 requires a 5 minute warmup to reach thermal
equilibrium after power is applied, and calibration may drift
slightly during this time. Occasional recalibration will provide a
slight improvement in distortion and noise performance during
warmup.
AUT OZE RO (Pin 45)
T he Autozero function may be used to digitally correct internal
offsets in the T rack/Hold and ADC as well as external offsets.
T o use Autozero the T rack/Hold input must be connected to a
zero reference prior to the zeroing conversion. T his connection
is external to the AD1385 and must be provided by the user;
the resistance of this connection is not critical but should be less
than 1000
. An Autozero cycle forces the AD1385’s digital
output to indicate exactly zero when its input is at the zero
point, nominally 0 V. (T his assumes that the complementary
twos complement data format is used. Autozero forces the digi-
tal output to midscale when the selected data format is comple-
mentary offset binary.) Autozero operates by storing the digital
result of a zeroing conversion and subtracting it from all subse-
quent conversion results. T his reduces the maximum nonsat-
urating input of the AD1385 a small amount at one end of its
range depending on the magnitude and polarity of the offset.
T he Autozero feature is enabled by driving the Autozero input
(Pin 45) low before a falling edge at the Data Strobe output.
Offset data will be stored on the first rising edge of Data Strobe
after Autozero is brought high; the offset data are also available
on the AD1385’s data bus during this Data Strobe pulse. Au-
tozero operation is illustrated in Figure 24. All subsequent A/D
conversions will be digitally corrected by the offset term as long
as Autozero remains high. T he offset register is cleared when
Autozero goes low and the contents of the data output registers
will revert to their uncorrected value. Figure 24 shows Autozero
timing requirements. Autozero cannot be activated until the
first conversion after power-up has been completed.
T he Autozero feature may be disabled by keeping Autozero low.
Figure 24. Autozero Cycle Operation
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