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參數(shù)資料
| 型號： | AD10226AB |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | Dual-Channel, 12-Bit 125 MSPS IF Sampling A/D Converter |
| 中文描述： | DUAL 1-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PBGA385 |
| 封裝： | 35 X 35 MM, BGA-385 |
| 文件頁數(shù)： | 5/20頁 |
| 文件大?。?/td> | 976K |
| 代理商： | AD10226AB |
REV. 0
AD10226
–5–
PIN CONFIGURATION
35mm SQUARE
BOTTOM VIEW
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
T
U
V
W
Y
AA
AB
AC
AD
AE
24
22
20
18
16
14
12
10
8
6
4
2
25
23
21
19
17
15
13
11
9
7
5
3
1
PIN FUNCTION DESCRIPTIONS
Mnemonic
Function
AGNDA
REF_A_OUT
NC
A
IN
A1
A
IN
A2
AV
CC
A
DGNDA
D11A–D0A
ENCODEA
ENCODEA
DV
CC
A
DGNDB
D11B–D0B
AGNDB
DV
CC
B
ENCODEB
ENCODEB
REF_B_OUT
A
IN
B1
A
IN
B2
AV
CC
B
DFS
SFDR Mode
A Channel Analog Ground. A and B grounds should be connected as close to the device as possible.
A Channel Internal Voltage Reference
No connection
Analog Input for A side ADC (– input)
Analog Input for A side ADC (+ input)
Analog Positive Supply Voltage (nominally 5.0 V)
A Channel Digital Ground
Digital Outputs for ADC A. D0 (LSB)
Complement of ENCODE
Data conversion initiated on the rising edge of ENCODE input.
Digital Positive Supply Voltage (nominally 3.3 V)
B Channel Digital Ground
Digital Outputs for ADC B. D0 (LSB)
B Channel Analog Ground. A and B grounds should be connected as close to the device as possible.
Digital Positive Supply Voltage (nominally 3.3 V)
Complement of ENCODE
Data conversion initiated on rising edge of ENCODE input.
B Channel Internal Voltage Reference
Analog Input for B side ADC (– input)
Analog Input for B side ADC (+ input)
Analog Positive Supply Voltage (nominally 5.0 V)
Data format select. Low = Two’s Complement, High = Binary.
CMOS control pin that enables (SFDR MODE = 1) a proprietary circuit that may improve the spurious free dynamic
range (SFDR) performance. It is useful in applications where the dynamic range of the system is limited by discrete spurious
frequency content caused by nonlinearities in the ADC transfer function. SFDR Mode = 0 for normal operation.
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