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參數(shù)資料
| 型號： | ACT-PS512K8 |
| 廠商： | Aeroflex Inc. |
| 英文描述： | ACT-PS512K8 High Speed 4 Megabit Plastic Monolithic SRAM |
| 中文描述： | 行為PS512K8高速4兆位單片SRAM的塑料 |
| 文件頁數(shù)： | 1/6頁 |
| 文件大?。?/td> | 73K |
| 代理商： | ACT-PS512K8 |
CIRCUIT TECHNOLOGY
www.aeroflex.com
eroflex Circuit Technology - Advanced Multichip Modules SCD3764 REV A 6/2/98
General Description
The ACT-PS512K8 is a
Plastic High Speed, 4 Megabit
(4,194,304
bits)
Monolithic SRAM organized as
524,288 words by 8 bits.
Designed for high-speed, high
density, high reliablility, mass
memory and fast cache system
applications.
The plastic monolithic is
input
and
compatible. Writing is executed
when the write enable (WE)
and chip enable (CE) inputs are
low. Reading is accomplished
when WE is high and CE and
output enable (OE) are both
low. Access time grades of
10ns 12ns, 15ns, 17ns, 20ns
and 25ns are standard.
CMOS
output
TTL
512Kx8
OE
A
0
–
A
18
I/O
0-7
8
WE
CE
Pin Description
I/O
0-7
Data I/O
A
0–18
Address Inputs
WE
Write Enable
CE
Chip Enable
OE
Output Enable
V
CC
Power Supply
V
SS
Ground
NC
Not Connected
V
ss
V
cc
Block
Diagram – SOJ (L2)
Plastic Path Features
I
Low Power Monolithic CMOS 512K x 8 SRAM
I
Operating Temperature Range
G
Full Military (-55°C to +125°C)
G
Industrial (-40°C to +85°C)
I
Burn-in and Temperature Cycle Available
I
10, 12, 15, 17, 20 & 25ns Access Times
I
+5V Power Supply
I
Industry Standard Pinouts
G
Center Power / Ground Pins
I
TTL Compatible I/O
I
3.3V Device I/O Interfacing
I
JEDEC Standard 36 pin Plastic SOJ Package
G
36 Lead, .93" x .405" x 0.148 Small Outline J lead (SOJ),
Aeroflex code# "L2"
I
Fully Static Operation
G
No Clocks or Refresh Required
4 Megabit Plastic Monolithic SRAM
ACT-PS512K8 High Speed
F
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D
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A
B
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ISO
9001
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| ACT-9S512K8X-012L2I | ACT-PS512K8 High Speed 4 Megabit Plastic Monolithic SRAM |
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| ACT-9S512K8X-015L2I | ACT-PS512K8 High Speed 4 Megabit Plastic Monolithic SRAM |
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