參數(shù)資料
型號(hào): ACS174HMSR-03
廠商: INTERSIL CORP
元件分類: 通用總線功能
英文描述: Radiation Hardened Hex D-Type Flip-Flop with Reset
中文描述: AC SERIES, HEX POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, UUC16
封裝: DIE-16
文件頁數(shù): 1/2頁
文件大?。?/td> 39K
代理商: ACS174HMSR-03
1
File Number
4762
ACS174MS
Radiation Hardened Hex D-Type Flip-Flop
with Reset
The Radiation Hardened ACS174MS is a Hex D-Type Flip-
Flop with Reset. Information at the D input is transferred to
the Q output on the positive-going transition of the clock. All
six flip-flops are controlled by a common clock (CP) and a
common reset (MR). Resetting is accomplished by a LOW
level independent of the clock. All inputs are buffered and
the outputs are designed for balanced propagation delay
and transition times.
The ACS174MS is fabricated on a CMOS Silicon on
Sapphire (SOS) process, which provides an immunity to
Single Event Latch-up and the capability of highly reliable
performance in any radiation environment. These devices
offer significant power reduction and faster performance
when compared to ALSTTL types.
Specifications for Rad Hard QML devices are controlled
by the Defense Supply Center in Columbus (DSCC). The
SMD numbers listed below must be used when ordering.
Detailed Electrical Specifications for the ACS174MS are
contained in SMD 5962-98634. A “hot-link” is provided
on our homepage for downloading.
http://www.intersil.com/spacedefense/spaceselect.htm
Features
QML Qualified Per MIL-PRF-38535 Requirements
1.25 Micron Radiation Hardened SOS CMOS
Radiation Environment
- Latch-Up Free Under Any Conditions
- Total Dose (Max.) . . . . . . . . . . . . . . . . . 3 x 10
5
RAD(Si)
- SEU Immunity. . . . . . . . . . . . .<1 x 10
-10
Errors/Bit/Day
- SEU LET Threshold . . . . . . . . . . . . >100MeV/(mg/cm
2
)
Input Logic Levels. . . . V
IL
= (0.3)(V
CC
), V
IH
= (0.7)(V
CC
)
Output Current
. . . . . . . . . . . . . . . . . . . . . . . . . . ±
12mA (Min)
Quiescent Supply Current . . . . . . . . . . . . . . . 10
μ
A (Max)
Propagation Delay . . . . . . . . . . . . . . . . . . . . . .23ns (Max)
Applications
High Speed Control Circuits
Sensor Monitoring
Low Power Designs
Ordering Information
ORDERING NUMBER
INTERNAL MARKETING
NUMBER
TEMP. RANGE (
o
C)
PACKAGE
DESIGNATOR
5962F9863401VCC
ACS174DMSR-03
-55 to 125
16 Ld SBDIP
CDIP2-T16
ACS174D/SAMPLE-03
ACS174D/SAMPLE-03
25
16 Ld SBDIP
CDIP2-T16
5962F9863401VXC
ACS174KMSR-03
-55 to 125
16 Ld Flatpack
CDFP4-F16
ACS174K/SAMPLE-03
ACS174K/SAMPLE-03
25
16 Ld Flatpack
CDFP4-F16
5962F9863401V9A
ACS174HMSR-03
25
Die
NA
Pinouts
ACS174MS
(SBDIP)
TOP VIEW
ACS174MS
(FLATPACK)
TOP VIEW
14
15
16
9
13
12
11
10
1
2
3
4
5
7
6
8
MR
Q0
D0
D1
Q1
D2
GND
Q2
V
CC
D5
D4
Q4
D3
Q3
CP
Q5
MR
Q0
D0
D1
Q1
D2
Q2
GND
2
3
4
5
6
7
8
1
16
15
14
13
12
11
10
9
V
CC
Q5
D5
D4
Q4
D3
Q3
CP
Data Sheet
July 1999
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright Intersil Corporation 1999
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