- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄378269 > ACS125HMSR (HARRIS SEMICONDUCTOR) Radiation Hardened Quad Buffer, Three-State PDF資料下載
參數(shù)資料
| 型號： | ACS125HMSR |
| 廠商： | HARRIS SEMICONDUCTOR |
| 元件分類： | 通用總線功能 |
| 英文描述： | Radiation Hardened Quad Buffer, Three-State |
| 中文描述： | AC SERIES, QUAD 1-BIT DRIVER, TRUE OUTPUT, UUC14 |
| 文件頁數(shù)： | 1/4頁 |
| 文件大?。?/td> | 50K |
| 代理商： | ACS125HMSR |
1
ACS125MS
Radiation Hardened
Quad Buffer, Three-State
Pinouts
14 PIN CERAMIC DUAL-IN-LINE
MIL-STD-1835 DESIGNATOR, CDIP2-T14,
LEAD FINISH C
TOP VIEW
14 PIN CERAMIC FLATPACK
MIL-STD-1835 DESIGNATOR, CDFP3-F14
LEAD FINISH C
TOP VIEW
OE1
A1
Y1
OE2
A2
Y2
GND
VCC
OE4
A4
Y4
OE3
A3
Y3
1
2
3
4
5
6
7
14
13
12
11
10
9
8
14
13
12
11
10
9
8
2
3
4
5
6
7
1
OE1
A1
Y1
OE2
A2
Y2
GND
VCC
OE4
A4
Y4
OE3
A3
Y3
Features
Devices QML Qualified in Accordance with MIL-PRF-38535
Detailed Electrical and Screening Requirements are Contained in
SMD# 5962-96705 and Intersil’s QM Plan
1.25 Micron Radiation Hardened SOS CMOS
Total Dose . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >300K RAD (Si)
Single Event Upset (SEU) Immunity: <1 x 10
-10
Errors/Bit/Day
(Typ)
SEU LET Threshold . . . . . . . . . . . . . . . . . . . . . . . >100 MEV-cm
2
/mg
Dose Rate Upset . . . . . . . . . . . . . . . . >10
11
RAD (Si)/s, 20ns Pulse
Dose Rate Survivability. . . . . . . . . . . >10
12
RAD (Si)/s, 20ns Pulse
Latch-Up Free Under Any Conditions
Military Temperature Range . . . . . . . . . . . . . . . . . .-55
o
C to +125
o
C
Significant Power Reduction Compared to ALSTTL Logic
DC Operating Voltage Range . . . . . . . . . . . . . . . . . . . . 4.5V to 5.5V
Input Logic Levels
- VIL = 30% of VCC Max
- VIH = 70% of VCC Min
Input Current
≤
1
μ
A at VOL, VOH
Fast Propagation Delay. . . . . . . . . . . . . . . . 15ns (Max), 10ns (Typ)
Description
The Intersil ACS125MS is a Radiation Hardened Quad Buffer with
Three-State outputs. Each output has it’s own enable input, which when
“HIGH” puts the output in a high impedance state.
The ACS125MS utilizes advanced CMOS/SOS technology to achieve
high-speed operation. This device is a member of radiation hardened,
high-speed, CMOS/SOS Logic Family.
The ACS125MS is supplied in a 14 lead Ceramic Flatpack (K suffix) or a
Ceramic Dual-In-Line Package (D suffix).
January 1996
Ordering Information
PART NUMBER
TEMPERATURE RANGE
SCREENING LEVEL
PACKAGE
5962F9670501VCC
-55
o
C to +125
o
C
MIL-PRF-38535 Class V
14 Lead SBDIP
5962F9670501VXC
-55
o
C to +125
o
C
MIL-PRF-38535 Class V
14 Lead Ceramic Flatpack
ACS125D/Sample
25
o
C
Sample
14 Lead SBDIP
ACS125K/Sample
25
o
C
Sample
14 Lead Ceramic Flatpack
ACS125HMSR
25
o
C
Die
Die
Spec Number
518817
File Number
3565.1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright Intersil Corporation 1999
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ACS132D | Radiation Hardened Quad 2-Input NAND Schmitt Trigger |
| ACS132MS | Radiation Hardened Quad 2-Input NAND Schmitt Trigger(抗輻射四2輸入與非門施密特觸發(fā)器) |
| ACS132K | Radiation Hardened Quad 2-Input NAND Schmitt Trigger |
| ACS138MS | Radiation Hardened 3-to-8 Line Decoder/Demultiplexer(抗輻射3-8線譯碼器/多路信號分離器) |
| ACS138DMSR-02 | Radiation Hardened 3-to-8 Line Decoder/Demultiplexer |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ACS125K | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened Quad Buffer, Three-State |
| ACS125MS | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened Quad Buffer, Three-State |
| ACS132D | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened Quad 2-Input NAND Schmitt Trigger |
| ACS132K | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened Quad 2-Input NAND Schmitt Trigger |
| ACS132MS | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened Quad 2-Input NAND Schmitt Trigger |
發(fā)布緊急采購，3分鐘左右您將得到回復。