參數(shù)資料
型號(hào): ACPL-072L-500E
元件分類: 光電耦合器
英文描述: 1 CHANNEL LOGIC OUTPUT OPTOCOUPLER, 25 Mbps
封裝: ROHS COMPLIANT, SURFACE MOUNT, SOP-8
文件頁(yè)數(shù): 1/11頁(yè)
文件大小: 286K
代理商: ACPL-072L-500E
ACPL-772L and ACPL-072L
3.3V/5V High Speed CMOS Optocoupler
Data Sheet
Description
Available in either an 8-pin DIP or SO-8 style respectively,
the ACPL-772L or ACPL-072L optocouplers utilize the
latest CMOS IC technology to achieve outstanding speed
performance of minimum 25MBd data rate and 6ns
maximum pulse width distortion.
Basic building blocks of this family of products are a
CMOS LED driver IC, a high speed LED and a CMOS
detector IC. A CMOS logic input signal controls the LED
driver IC, which supplies current to the LED. The detector
IC incorporates an integrated photodiode, a high speed
transimpedance amplifier, and a voltage comparator with
an output driver.
Functional Diagram
Features
Dual voltage operation (3.3V and 5V)
Allow level shifting functionality
Support high Speed datarate of 25 MBd
Wide Temperature operation
CMOS output and buffer input
Compatible with CMOS and TTL logic level
Lower power consumption with 3.3V supply
Good AC performance with lower pulse width
distortion
Lead-free option available
Specifications
3.3V and 5V CMOS Compatibility
High Speed: DC to 25 MBd
6ns max. Pulse Width Distortion
40 ns max. Prop. Delay
20 ns max. Prop. Delay Skew
10 kV/ms min. Common Mode Rejection
-40 °C to 105 °C Temperature Range
Safety and Regulatory Approvals:
UL Recognised
- 5000Vrms for 1 min. per UL1577 for ACPL-772L
for option 020
- 3750Vrms for 1 min. per UL1577 for ACPL-072L
CSA Component Acceptance Notice #5
IEC/EN/DIN EN 60747-5-2
– VIORM = 630 Vpeak for ACPL-772L Option 060
– VIORM = 560 Vpeak for ACPL-072L Option 060
Applications
Digital Fieldbus Isolation: DeviceNet, Profibus, SDS
Multiplexed Data Transmission
General Instrument and Data Acquisition
Computer Peripheral interface
Microprocessor System Interface
8
7
6
1
3
SHIELD
5
2
4
**VDD1
VI
NC*
GND 1
VDD2**
VO
GND 2
NC*
IO
LED1
CAUTION: It is advised that normal static precautions be taken in handling and assembly
of this component to prevent damage and/or degradation, which may be induced by ESD.
Lead (Pb) Free
RoHS 6 fully
compliant
RoHS 6 fully compliant options available;
-xxxE denotes a lead-free product
* Pin 3 is the anode of the internal LED and must be left unconnected
for guaranteed datasheet performance. Pin 7 is not connected
internally.
** A 0.1uF bypass capacitor must be connected between pins 1 and 4,
and 5 and 8.
TRUTH TABLE (POSITIVE LOGIC)
VI, INPUT
LED1
VO, OUTPUT
H
OFF
H
L
ON
L
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