參數(shù)資料
型號： ACNW3130-500E
元件分類： 光電耦合器
英文描述： 1 CHANNEL LOGIC OUTPUT OPTOCOUPLER
封裝： 0.300 INCH, ROHS COMPLIANT, SURFACE MOUNT, DIP-8
文件頁數(shù)： 11/20頁
文件大小： 526K
代理商： ACNW3130-500E
Figure 39. Minimum LED Skew for Zero Dead Time.
Figure 38. Under Voltage Lock Out.
Under Voltage Lockout Feature. (Discussion applies to
ACPL-3130, ACPL-J313, and ACNW3130)
TheACPL-3130containsanundervoltagelockout(UVLO)
feature that is designed to protect the IGBT under fault
conditions which cause the ACPL-3130 supply voltage
(equivalent to the fully-charged IGBT gate voltage) to
drop below a level necessary to keep the IGBT in a low
resistancestate.WhentheACPL-3130outputisinthehigh
stateandthesupplyvoltagedropsbelowtheACPL-3130
VUVLO– threshold (9.5 <VUVLO– < 12.0) the optocoupler
outputwillgointothelowstatewithatypicaldelay,UVLO
TurnOffDelay,of0.6s.
When the ACPL-3130 output is in the low state and the
supplyvoltagerisesabovetheACPL-3130VUVLO+threshold
(11.0<VUVLO+<13.5)theoptocoupleroutputwillgointo
thehighstate(assumesLEDis“ON”)withatypicaldelay,
UVLOTurnOnDelayof0.8s.
Dead Time and Propagation Delay Specifications. (Discus-
sion applies to ACPL-3130, ACPL-J313, and ACNW3130)
The ACPL-3130 includes a Propagation Delay Difference
(PDD)specificationintendedtohelpdesignersminimize
“dead time” in their power inverter designs. Dead time
is the time period during which both the high and low
side power transistors (Q1 and Q2 in Figure 29) are off.
AnyoverlapinQ1andQ2conductionwillresultinlarge
currentsflowingthroughthepowerdevicesbetweenthe
highandlowvoltagemotorrails.
Figure 37. Recommended LED Drive Circuit for Ultra-High CMR.
Tominimizedeadtimeinagivendesign,theturnonof
LED2shouldbedelayed(relativetotheturnoffofLED1)
sothatunderworst-caseconditions,transistorQ1hasjust
turnedoffwhentransistorQ2turnson,asshowninFigure
35.Theamountofdelaynecessarytoachievethiscondition
isequaltothemaximumvalueofthepropagationdelay
differencespecification,PDDMAX,whichisspecifiedtobe
350nsovertheoperatingtemperaturerangeof-40°Cto
100°C.
Delaying the LED signal by the maximum propagation
delaydifferenceensuresthattheminimumdeadtimeis
zero, but it does not tell a designer what the maximum
deadtimewillbe.Themaximumdeadtimeisequivalent
to the difference between the maximum and minimum
propagation delay difference specifications as shown in
Figure40.ThemaximumdeadtimefortheACPL-3130is
700ns(=350ns-(-350ns))overanoperatingtemperature
rangeof-40°Cto100°C.
NotethatthepropagationdelaysusedtocalculatePDD
anddeadtimearetakenatequaltemperaturesandtest
conditions since the optocouplers under consideration
aretypicallymountedincloseproximitytoeachotherand
areswitchingidenticalIGBTs.
1
3
2
4
8
6
7
5
CLEDP
CLEDN
SHIELD
+5 V
V O
-OUTPUT
VOLTAGE
-
V
0
(V CC - V EE ) - SUPPLY VOLTAGE - V
10
5
14
10
15
2
20
6
8
4
12
(12.3, 10.8)
(10.7, 9.2)
(10.7, 0.1)
(12.3, 0.1)
t PHL MAX
tPLH MIN
PDD* MAX = (t PHL - tPLH )MAX = t PHL MAX - tPLH MIN
*PDD = PROPAGATION DELAY DIFFERENCE
NOTE: FOR PDD CALCULATIONS THE PROPAGATION DELAYS
ARE TAKEN AT THE SAME TEMPERATURE AND TEST CONDITIONS.
VOUT1
ILED2
VOUT2
ILED1
Q1 ON
Q2 OFF
Q1 OFF
Q2 ON
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