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參數(shù)資料
| 型號(hào)： | AB |
| 英文描述： | ST10F280 - ERRATA SHEET REVISION AB - FEB 2002 |
| 中文描述： | ST10F280 -勘誤表修訂本抗體- 2002年2月 |
| 文件頁(yè)數(shù)： | 2/4頁(yè) |
| 文件大?。?/td> | 31K |
| 代理商： | AB |
ST10F280-AB
2/4
2.2 - MAC.9 - CoCMP Instruction Inverted Operands
The ST10 Family Programming Manual describes the CoCMP instruction as: subtracts a 40-bit signed
operand from th 40-bit accumulator content (acc - op2\op1), and updates the N, Z and C flags in the MSW
register, leaving the accumulator unchanged. On the device the reverse operation (op2\op1 - acc) has
been implemented in the Mac Unit. Therefore, the N and C flags are set according to the reverse
operation (Z flag is not affected).
Workaround:
Change interpretation of the N and C flags in the MSW register.
Example:
MOV
R12, #07h
MOV
R13, #06h
MOV
R14, #0
CoLOAD
R14, R12
; Accumulator = 70000h
CoCMP
R14, R13
; Compares 70000h to 60000h
Here the content of MSW is 0500h, i.e. C = 1, Z = 0 and N = 1.
To test if the Accumulator was greater than or equal the compared value, the "normal" test, according to
the description in the ST10 Programming Manual, would be:
JNB
MSW.10, Greater
; If C flag cleared, then greater than or equal
With the implementation, this test does not provide the expected result.
To obtain the correct comparison, use instead:
JB
MSW.10, Greater
; C flag set: 60000h < 70000h (60000h-70000h implemented)
; i.e. the accumulator is greater than or equal compared value
2.3 - MAC.10 - E Flag Evaluation for CoSHR and CoASHR Instructions when Saturation Mode is Enabled
The Logical and the Arithmetic Right Shift instructions (CoSHR/CoASHR) are specififed not to be affected
by the saturation mode (MS bit of the MCW register): the shift operation is always made on the 40 bits of
the accumulator. The result shifted in the accumulator is never saturated. Only when the saturation mode
is enabled, the evaluation of the E Flag (in the MSW register) is erroneous.
Comment to the example:
In the example below (Table 1), the E Flag is kept cleared however MAE is used: bit 0 of MAE has been
shifted into bit 15 of MAH. The MAE part has been used and it contents significant bits but the E Flag has
not been set.
The content of the flags is given after the execution of the instruction.
Workaround:
If the MAE flag is used, the saturation mode must be disabled before running Logical and/or Arihmetic
Right Shift instructions and re-enable just after.
Table 1 : MAC.10 Example
MS Bit is Set, Saturation Mode is Enabled
Status of Flags After Instruction Execution
Code
Accumulator Value
(Hexa.)
SL
E
SV
C
Z
N
Remark
MOV
R5, #5555h
--
----
-
-----
-
CoLOAD
R5, R5
00
5555
0
00000
Right
NOP
00
5555
0
00000
Right
MOV
MSW, #007Fh
7F
5555
0
00000
Right
NOP
7F
5555
0
00000
Right
CoSHR
#1
3F
AAAA
0
0*
0000
*E is wrong
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