參數(shù)資料
型號(hào): AAT3685
廠商: Advanced Analog Technology,lnc.
英文描述: Lithium-Ion/Polymer Battery Charger
中文描述: 鋰離子電池充電器
文件頁(yè)數(shù): 18/23頁(yè)
文件大?。?/td> 557K
代理商: AAT3685
Data Timing
The system microcontroller should assert an active
low data request pulse for minimum duration of
200ns; this is specified by T
LO(DATA)
. Upon sensing
the rising edge of the end of the data request pulse,
the AAT3685 status data control will reply the data
word back to the system microcontroller after a
delay specified by the data report time specification
T
DATA(RPT)
. The period of the following group of data
pulses will be specified by the T
DATA
specification.
AAT3685
Lithium-Ion/Polymer Battery Charger
18
3685.2006.10.1.3
Timing Diagram
SQ
SQ
PULSE
Data
System Reset
System Start
CK
T
SYNC
T
LAT
N=1
N=2
N=3
T
OFF
T
DATA(RPT)
= T
SYNC
+ T
LAT
< 2.5 P
DATA
T
OFF
> 2 P
DATA
P
DATA
Thermal Considerations
The AAT3685 is packaged in a Pb-free, 3x3mm
TDFN package which can provide up to 2.0W of
power dissipation when it is properly bonded to a
printed circuit board and has a maximum thermal
resistance of 50°C/W. Many considerations should
be taken into account when designing the printed
circuit board layout, as well as the placement of the
charger IC package in proximity to other heat gen-
erating devices in a given application design. The
ambient temperature around the charger IC will
also have an affect on the thermal limits of a bat-
tery charging application. The maximum limits that
can be expected for a given ambient condition can
be estimated by the following discussion.
First, the maximum power dissipation for a given
situation should be calculated:
Eq. 4:
Where:
P
D
V
IN
V
BAT
= Battery Voltage as Seen at the BAT Pin
I
CC
= Maximum Constant Fast Charge Current
Programmed for the Application
= Total Power Dissipation by the Device
= Input Voltage Level, V
ADP/USB
I
OP
= Quiescent Current Consumed by the
Charger IC for Normal Operation
Next, the maximum operating ambient temperature
for a given application can be estimated based on
the thermal resistance of the 3x3mm TDFN pack-
age when sufficiently mounted to a PCB layout and
the internal thermal loop temperature threshold.
Eq. 5:
T
A
= T
J
- (
θ
JA
·
P
D
)
P
D
= [(V
IN
- V
BAT
)
·
I
CC
+ (V
IN
·
I
OP
)]
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