參數(shù)資料
型號: AAT3242ITP-IP-T1
廠商: Advanced Analog Technology,lnc.
元件分類: 基準電壓源/電流源
英文描述: 300mA/150mA Dual CMOS LDO Linear Regulator
中文描述: 300mA/150mA LDO線性穩(wěn)壓器的CMOS雙
文件頁數(shù): 2/16頁
文件大?。?/td> 274K
代理商: AAT3242ITP-IP-T1
AAT3242
300mA/150mA Dual CMOS LDO Linear Regulator
2
3242.2006.04.1.10
Pin Descriptions
Pin Configuration
TSOPJW-12
(Top View)
1
2
3
4
5
6
12
11
10
9
8
7
ENA
GND
GND
POKA
OUTB
INB
INA
OUTA
POKB
GND
GND
ENB
Pin #
Symbol
Function
1
ENA
Enable Regulator A pin; this pin should not be left floating. When pulled
low, the PMOS pass transistor turns off and the device enters shutdown
mode, consuming less than 1μA.
2, 3, 8, 9
GND
Ground connection pins.
4
POKA
Power OK pin with open drain output. It is pulled low when the OUTA pin is
below the 10% regulation window.
5
OUTB
Low current (150mA) regulator output pin; should be decoupled with a
2.2μF or greater output low-ESR ceramic capacitor.
6
INB
Input voltage pin for Regulator B; should be decoupled with 1μF or greater
capacitor.
7
ENB
Enable Regulator B; this pin should not be left floating. When pulled low, the
PMOS pass transistor turns off and the device enters shutdown mode, con-
suming less than 1μA.
10
POKB
Power OK pin with open drain output. It is pulled low when the OUTB pin is
below the 10% regulation window.
11
OUTA
High-current (300mA) regulator output pin; should be decoupled with a
2.2μF or greater output low-ESR ceramic capacitor.
12
INA
Input voltage pin for Regulator A; should be decoupled with 1μF or greater
capacitor.
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