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參數(shù)資料
| 型號： | AAT1231ITP-1-T1 |
| 廠商： | Advanced Analog Technology,lnc. |
| 英文描述： | Step-Up DC/DC Converters for White LED Backlight Applications |
| 中文描述： | 升壓型DC / DC轉(zhuǎn)換器，用于白光LED背光應(yīng)用 |
| 文件頁數(shù)： | 21/27頁 |
| 文件大?。?/td> | 1535K |
| 代理商： | AAT1231ITP-1-T1 |
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AAT1231/1231-1
Step-Up DC/DC Converters for
White LED Backlight Applications
1231.2007.01.1.2
21
Selecting the Boost Capacitors
The high output ripple inherent in the boost con-
verter necessitates low impedance output filtering.
Multi-layer ceramic (MLC) capacitors provide small
size and adequate capacitance, low parasitic
equivalent series resistance (ESR) and equivalent
series inductance (ESL), and are well suited for
use with the AAT1231/1231-1 boost regulator. MLC
capacitors of type X7R or X5R are recommended
to ensure good capacitance stability over the full
operating temperature range.
The output capacitor is sized to maintain the output
load without significant voltage droop (
Δ
V
OUT
) dur-
ing the power switch ON interval, when the output
diode is not conducting. A ceramic output capacitor
from 2.2μF to 4.7μF is recommended (see Table 5).
Typically, 25V rated capacitors are required for the
24V maximum boost output. Ceramic capacitors
sized as small as 0805 are available which meet
these requirements.
MLC capacitors exhibit significant capacitance
reduction with applied voltage. Output ripple meas-
urements should confirm that output voltage droop
and operating stability are acceptable. Voltage derat-
ing can minimize this factor, but results may vary with
package size and among specific manufacturers.
Output capacitor size can be estimated at a switch-
ing frequency (F
S
) of 500kHz (worst case).
To maintain stable operation at full load, the output
capacitor should be sized to maintain
Δ
V
OUT
between 100mV and 200mV.
The boost converter input current flows during both
ON and OFF switching intervals. The input ripple
current is less than the output ripple and, as a
result, less input capacitance is required.
PCB Layout Guidelines
Boost converter performance can be adversely
affected by poor layout. Possible impact includes
high input and output voltage ripple, poor EMI per-
formance, and reduced operating efficiency. Every
attempt should be made to optimize the layout in
order to minimize parasitic PCB effects (stray resist-
ance, capacitance, and inductance) and EMI cou-
pling from the high frequency SW node. A suggest-
ed PCB layout for the AAT1231/1231-1 boost con-
verter is shown in Figures 10 and 11. The following
PCB layout guidelines should be considered:
1. Minimize the distance from Capacitor C1 and
C2 negative terminal to the PGND pins. This is
especially true with output capacitor C2, which
conducts high ripple current from the output
diode back to the PGND pins.
2. Minimize the distance between L1 to DS1 and
switching pin SW; minimize the size of the PCB
area connected to the SW pin.
3. Maintain a ground plane and connect to the IC
PGND pin(s) as well as the GND terminals of
C1 and C2.
4. Consider additional PCB area on DS1 cathode
to maximize heatsinking capability. This may
be necessary when using a diode with a high
V
F
and/or thermal resistance.
I
OUT
· D
MAX
F
S
·
Δ
V
OUT
C
OUT
=
Table 6: Recommended Ceramic Capacitors.
Manufacturer
Part Number
Value (μF)
Voltage Rating
Temp Co
Case Size
Murata
Murata
Murata
Murata
Murata
GRM188R60J225KE19
GRM188R61A225KE34
GRM219R61E225KA12
GRM21BR71E225KA73L
GRM21BR61E475KA12
2.2
2.2
2.2
2.2
4.7
6.3
10
25
25
25
X5R
X5R
X5R
X7R
X5R
0603
0603
0805
0805
0805
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