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參數(shù)資料
| 型號(hào)： | AAT1106ICB-1.8-T1 |
| 廠商： | Advanced Analogic Technologies, Inc. |
| 英文描述： | 600mA Step-Down Converter |
| 中文描述： | 600mA降壓轉(zhuǎn)換器 |
| 文件頁(yè)數(shù)： | 15/18頁(yè) |
| 文件大?。?/td> | 927K |
| 代理商： | AAT1106ICB-1.8-T1 |
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AAT1106
600mA Step-Down Converter
1106.2007.07.1.0
15
I
Q
is the step-down converter quiescent current.
The term t
sw
is used to estimate the full load step-
down converter switching losses.
For the condition where the step-down converter is
in dropout at 100% duty cycle, the total device dis-
sipation reduces to:
Since R
DS(ON)
, quiescent current, and switching
losses all vary with input voltage, the total losses
should be investigated over the complete input volt-
age range. Given the total losses, the maximum
junction temperature can be derived from the
θ
JA
for the TSOT23-5 package which is 150°C/W.
Layout Guidance
When laying out the PC board, the following steps
should be taken to ensure proper operation of the
AAT1106. These items are also illustrated graphi-
cally in Figure 3.
1.
The power traces (GND, LX, IN) should be kept
short, direct, and wide to allow large current
flow. Place sufficient multiply-layer pads when
needed to change the trace layer.
The input capacitor (C1) should connect as
closely as possible to IN (Pin 4) and GND (Pin 2).
3. The output capacitor C3 and L1 should be con-
nected as closely as possible. The connection
of L1 to the LX pin should be as short as pos-
sible and there should not be any signal lines
under the inductor.
4. The feedback FB trace or OUT pin (Pin 5) should
be separate from any power trace and connect
as closely as possible to the load point. Sensing
along a high-current load trace will degrade DC
load regulation. If external feedback resistors are
used, they should be placed as closely as possi-
ble to the FB pin (Pin 5) to minimize the length of
the high impedance feedback trace.
5. The resistance of the trace from the load return
to the GND (Pin 2) should be kept to a minimum.
This will help to minimize any error in DC regu-
lation due to differences in the potential of the
internal signal ground and the power ground.
2.
T
J(MAX)
=
P
TOTAL
·
Θ
JA
+ T
AMB
P
TOTAL
= I
O
2
· R
DSON(HS)
+ I
Q
· V
IN
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